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Commit e34ca96b authored by Jacopo Mondi's avatar Jacopo Mondi Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a77965: Add GPIO nodes 



Add GPIO nodes to r8a77965 SoC device tree file.

Signed-off-by: default avatarJacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 0ea5b2fd

arch/arm64/boot/dts/renesas/r8a77965.dtsi

+96 −8
Original line number Diff line number Diff line
@@ -197,35 +197,123 @@ 
		};



		gpio0: gpio@e6050000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6050000 0 0x50>;

			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 0 16>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 912>;

			power-domains = <&sysc 32>;

			resets = <&cpg 912>;

		};



		gpio1: gpio@e6051000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6051000 0 0x50>;

			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 32 29>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 911>;

			power-domains = <&sysc 32>;

			resets = <&cpg 911>;

		};



		gpio2: gpio@e6052000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6052000 0 0x50>;

			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 64 15>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 910>;

			power-domains = <&sysc 32>;

			resets = <&cpg 910>;

		};



		gpio3: gpio@e6053000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6053000 0 0x50>;

			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 96 16>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 909>;

			power-domains = <&sysc 32>;

			resets = <&cpg 909>;

		};



		gpio4: gpio@e6054000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6054000 0 0x50>;

			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 128 18>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 908>;

			power-domains = <&sysc 32>;

			resets = <&cpg 908>;

		};



		gpio5: gpio@e6055000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6055000 0 0x50>;

			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 160 26>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 907>;

			power-domains = <&sysc 32>;

			resets = <&cpg 907>;

		};



		gpio6: gpio@e6055400 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6055400 0 0x50>;

			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 192 32>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 906>;

			power-domains = <&sysc 32>;

			resets = <&cpg 906>;

		};



		gpio7: gpio@e6055800 {

			/* placeholder */

			compatible = "renesas,gpio-r8a77965",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6055800 0 0x50>;

			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 224 4>;

			#interrupt-cells = <2>;

			interrupt-controller;

			clocks = <&cpg CPG_MOD 905>;

			power-domains = <&sysc 32>;

			resets = <&cpg 905>;

		};



		intc_ex: interrupt-controller@e61c0000 {