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Commit de3f2b7f authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Merge android-4.19.14 (8735c217) into msm-4.19"

parents 80f43c7f 77906c09

Documentation/admin-guide/kernel-parameters.txt

+3 −0
Original line number Diff line number Diff line
@@ -2080,6 +2080,9 @@ 
			off

				Disables hypervisor mitigations and doesn't

				emit any warnings.

				It also drops the swap size and available

				RAM limit restriction on both hypervisor and

				bare metal.



			Default is 'flush'.

Documentation/admin-guide/l1tf.rst

+5 −1
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@@ -405,6 +405,9 @@ time with the option "l1tf=". The valid arguments for this option are: 


  off		Disables hypervisor mitigations and doesn't emit any

		warnings.

		It also drops the swap size and available RAM limit restrictions

		on both hypervisor and bare metal.



  ============  =============================================================



The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`.
@@ -576,7 +579,8 @@ Default mitigations 
  The kernel default mitigations for vulnerable processors are:



  - PTE inversion to protect against malicious user space. This is done

    unconditionally and cannot be controlled.

    unconditionally and cannot be controlled. The swap storage is limited

    to ~16TB.



  - L1D conditional flushing on VMENTER when EPT is enabled for

    a guest.

Makefile

+1 −1
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# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 19

SUBLEVEL = 12

SUBLEVEL = 14

EXTRAVERSION =

NAME = "People's Front"

arch/arc/Kconfig

+1 −0
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@@ -26,6 +26,7 @@ config ARC 
	select GENERIC_IRQ_SHOW

	select GENERIC_PCI_IOMAP

	select GENERIC_PENDING_IRQ if SMP

	select GENERIC_SCHED_CLOCK

	select GENERIC_SMP_IDLE_THREAD

	select HAVE_ARCH_KGDB

	select HAVE_ARCH_TRACEHOOK

arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi

+4 −5
Original line number Diff line number Diff line
@@ -26,8 +26,7 @@ 
			"Speakers", "SPKL",

			"Speakers", "SPKR";



		assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,

				<&clock CLK_MOUT_EPLL>,

		assigned-clocks = <&clock CLK_MOUT_EPLL>,

				<&clock CLK_MOUT_MAU_EPLL>,

				<&clock CLK_MOUT_USER_MAU_EPLL>,

				<&clock_audss EXYNOS_MOUT_AUDSS>,
@@ -36,8 +35,7 @@ 
				<&clock_audss EXYNOS_DOUT_AUD_BUS>,

				<&clock_audss EXYNOS_DOUT_I2S>;



		assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,

				<&clock CLK_FOUT_EPLL>,

		assigned-clock-parents = <&clock CLK_FOUT_EPLL>,

				<&clock CLK_MOUT_EPLL>,

				<&clock CLK_MOUT_MAU_EPLL>,

				<&clock CLK_MAU_EPLL>,
@@ -48,7 +46,6 @@ 
				<0>,

				<0>,

				<0>,

				<0>,

				<196608001>,

				<(196608002 / 2)>,

				<196608000>;
@@ -84,4 +81,6 @@ 


&i2s0 {

	status = "okay";

	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;

	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;

};