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Commit dc0352d1 authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

drm/omap: rename omap_dss_clk_source 



'enum omap_dss_clk_source' is internal to dss. Let's rename it to
'dss_clk_source' match our naming convention.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent be5d7319

drivers/gpu/drm/omapdrm/dss/dispc.c

+2 −2
Original line number Diff line number Diff line
@@ -3426,7 +3426,7 @@ static unsigned long dispc_plane_lclk_rate(enum omap_plane plane) 
static void dispc_dump_clocks_channel(struct seq_file *s, enum omap_channel channel)

{

	int lcd, pcd;

	enum omap_dss_clk_source lcd_clk_src;

	enum dss_clk_source lcd_clk_src;



	seq_printf(s, "- %s -\n", mgr_desc[channel].name);
@@ -3448,7 +3448,7 @@ void dispc_dump_clocks(struct seq_file *s) 
{

	int lcd;

	u32 l;

	enum omap_dss_clk_source dispc_clk_src = dss_get_dispc_clk_source();

	enum dss_clk_source dispc_clk_src = dss_get_dispc_clk_source();



	if (dispc_runtime_get())

		return;

drivers/gpu/drm/omapdrm/dss/dpi.c

+1 −1
Original line number Diff line number Diff line
@@ -123,7 +123,7 @@ static struct dss_pll *dpi_get_pll(enum omap_channel channel) 
	}

}



static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)

static enum dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)

{

	switch (channel) {

	case OMAP_DSS_CHANNEL_LCD:

drivers/gpu/drm/omapdrm/dss/dsi.c

+1 −1
Original line number Diff line number Diff line
@@ -1484,7 +1484,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device *dsidev, 
{

	struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);

	struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo;

	enum omap_dss_clk_source dispc_clk_src, dsi_clk_src;

	enum dss_clk_source dispc_clk_src, dsi_clk_src;

	int dsi_module = dsi->module_id;

	struct dss_pll *pll = &dsi->pll;

drivers/gpu/drm/omapdrm/dss/dss.c

+10 −10
Original line number Diff line number Diff line
@@ -91,9 +91,9 @@ static struct { 
	unsigned long	cache_prate;

	struct dispc_clock_info cache_dispc_cinfo;



	enum omap_dss_clk_source dsi_clk_source[MAX_NUM_DSI];

	enum omap_dss_clk_source dispc_clk_source;

	enum omap_dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS];

	enum dss_clk_source dsi_clk_source[MAX_NUM_DSI];

	enum dss_clk_source dispc_clk_source;

	enum dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS];



	bool		ctx_valid;

	u32		ctx[DSS_SZ_REGS / sizeof(u32)];
@@ -353,7 +353,7 @@ void dss_sdi_disable(void) 
	REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */

}



const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src)

const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src)

{

	return dss_generic_clk_source_names[clk_src];

}
@@ -402,7 +402,7 @@ static void dss_dump_regs(struct seq_file *s) 
#undef DUMPREG

}



static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)

static void dss_select_dispc_clk_source(enum dss_clk_source clk_src)

{

	int b;

	u8 start, end;
@@ -430,7 +430,7 @@ static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src) 
}



void dss_select_dsi_clk_source(int dsi_module,

		enum omap_dss_clk_source clk_src)

		enum dss_clk_source clk_src)

{

	int b, pos;
@@ -458,7 +458,7 @@ void dss_select_dsi_clk_source(int dsi_module, 
}



void dss_select_lcd_clk_source(enum omap_channel channel,

		enum omap_dss_clk_source clk_src)

		enum dss_clk_source clk_src)

{

	int b, ix, pos;
@@ -494,17 +494,17 @@ void dss_select_lcd_clk_source(enum omap_channel channel, 
	dss.lcd_clk_source[ix] = clk_src;

}



enum omap_dss_clk_source dss_get_dispc_clk_source(void)

enum dss_clk_source dss_get_dispc_clk_source(void)

{

	return dss.dispc_clk_source;

}



enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module)

enum dss_clk_source dss_get_dsi_clk_source(int dsi_module)

{

	return dss.dsi_clk_source[dsi_module];

}



enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel)

enum dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel)

{

	if (dss_has_feature(FEAT_LCD_CLK_SRC)) {

		int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 :

drivers/gpu/drm/omapdrm/dss/dss.h

+7 −7
Original line number Diff line number Diff line
@@ -102,7 +102,7 @@ enum dss_writeback_channel { 
	DSS_WB_LCD3_MGR =	7,

};



enum omap_dss_clk_source {

enum dss_clk_source {

	OMAP_DSS_CLK_SRC_FCK = 0,		/* OMAP2/3: DSS1_ALWON_FCLK

						 * OMAP4: DSS_FCLK */

	OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,	/* OMAP3: DSI1_PLL_FCLK
@@ -238,7 +238,7 @@ unsigned long dss_get_dispc_clk_rate(void); 
int dss_dpi_select_source(int port, enum omap_channel channel);

void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);

enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);

const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);

const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src);

void dss_dump_clocks(struct seq_file *s);



/* DSS VIDEO PLL */
@@ -263,12 +263,12 @@ int dss_sdi_enable(void); 
void dss_sdi_disable(void);



void dss_select_dsi_clk_source(int dsi_module,

		enum omap_dss_clk_source clk_src);

		enum dss_clk_source clk_src);

void dss_select_lcd_clk_source(enum omap_channel channel,

		enum omap_dss_clk_source clk_src);

enum omap_dss_clk_source dss_get_dispc_clk_source(void);

enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);

enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);

		enum dss_clk_source clk_src);

enum dss_clk_source dss_get_dispc_clk_source(void);

enum dss_clk_source dss_get_dsi_clk_source(int dsi_module);

enum dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);



void dss_set_venc_output(enum omap_dss_venc_type type);

void dss_set_dac_pwrdn_bgz(bool enable);