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Commit be5d7319 authored May 17, 2016 by Tomi Valkeinen

drm/omap: copy enum omap_dss_clk_source

At the moment 'enum omap_dss_clk_source' is in omapdss.h, shared by
omapdrm and omapfb. We're about to improve the omapdrm clock code, so we
need to make a separate copy of the enum for each driver.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

parent 50c0164a

drivers/gpu/drm/omapdrm/dss/dss.h

+11 −0

Original line number	Diff line number	Diff line
		@@ -102,6 +102,17 @@ enum dss_writeback_channel {
		DSS_WB_LCD3_MGR = 7,
		};

		enum omap_dss_clk_source {
		OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
		* OMAP4: DSS_FCLK */
		OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
		* OMAP4: PLL1_CLK1 */
		OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
		* OMAP4: PLL1_CLK2 */
		OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
		OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
		};

		enum dss_pll_id {
		DSS_PLL_DSI1,
		DSS_PLL_DSI2,

drivers/video/fbdev/omap2/omapfb/dss/dss.h

+11 −0

Original line number	Diff line number	Diff line
		@@ -73,6 +73,17 @@
		#define FLD_MOD(orig, val, start, end) \
		(((orig) & ~FLD_MASK(start, end)) \| FLD_VAL(val, start, end))

		enum omap_dss_clk_source {
		OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
		* OMAP4: DSS_FCLK */
		OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
		* OMAP4: PLL1_CLK1 */
		OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
		* OMAP4: PLL1_CLK2 */
		OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
		OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
		};

		enum dss_io_pad_mode {
		DSS_IO_PAD_MODE_RESET,
		DSS_IO_PAD_MODE_RFBI,

include/video/omapdss.h

+0 −11

Original line number	Diff line number	Diff line
		@@ -195,17 +195,6 @@ enum omap_overlay_caps {
		OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
		};

		enum omap_dss_clk_source {
		OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
		* OMAP4: DSS_FCLK */
		OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
		* OMAP4: PLL1_CLK1 */
		OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
		* OMAP4: PLL1_CLK2 */
		OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
		OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
		};

		enum omap_dss_output_id {
		OMAP_DSS_OUTPUT_DPI = 1 << 0,
		OMAP_DSS_OUTPUT_DBI = 1 << 1,