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Commit d7d33fd8 authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninit 



The power-down step logically belongs to the individual PHY uninit
sequence so move it there. The only functional change is that we will
power down now PHY 1 separately before PHY 0 and preserve the other bits
in the register which are defined as reserved.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459515767-29228-11-git-send-email-imre.deak@intel.com
parent c6c4696f

drivers/gpu/drm/i915/intel_ddi.c

+4 −3
Original line number Diff line number Diff line
@@ -1849,15 +1849,16 @@ static void broxton_phy_uninit(struct drm_i915_private *dev_priv, 
	val = I915_READ(BXT_PHY_CTL_FAMILY(phy));

	val &= ~COMMON_RESET_DIS;

	I915_WRITE(BXT_PHY_CTL_FAMILY(phy), val);



	val = I915_READ(BXT_P_CR_GT_DISP_PWRON);

	val &= ~GT_DISPLAY_POWER_ON(phy);

	I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);

}



void broxton_ddi_phy_uninit(struct drm_i915_private *dev_priv)

{

	broxton_phy_uninit(dev_priv, DPIO_PHY1);

	broxton_phy_uninit(dev_priv, DPIO_PHY0);



	/* FIXME: do this in broxton_phy_uninit per phy */

	I915_WRITE(BXT_P_CR_GT_DISP_PWRON, 0);

}



void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)