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Commit cfd093bb authored by Joachim Eastwood's avatar Joachim Eastwood Committed by Kishon Vijay Abraham I
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phy: lpc18xx-usb-otg: fix clock order in phy init 



Changing the frequency of the USB clock must be done before the
PLL is powered on (prepared). This matters when the USB clock
is not setup by either boot ROM or boot loader. Reorder the
function calls to adhere to the order noted in the user manual.

Signed-off-by: default avatarJoachim Eastwood <manabian@gmail.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 4a9e5ca1

drivers/phy/phy-lpc18xx-usb-otg.c

+3 −3
Original line number Original line Diff line number Diff line
@@ -33,12 +33,12 @@ static int lpc18xx_usb_otg_phy_init(struct phy *phy) 
	struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);

	struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);

	int ret;

	int ret;





	ret = clk_prepare(lpc->clk);

	/* The PHY must be clocked at 480 MHz */

	ret = clk_set_rate(lpc->clk, 480000000);

	if (ret)

	if (ret)

		return ret;

		return ret;





	/* The PHY must be clocked at 480 MHz */

	return clk_prepare(lpc->clk);

	return clk_set_rate(lpc->clk, 480000000);

}

}





static int lpc18xx_usb_otg_phy_exit(struct phy *phy)

static int lpc18xx_usb_otg_phy_exit(struct phy *phy)