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Commit cd5f48a7 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'samsung-dt-2' of... 

Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3

Merge "Samsung 2nd DT updates for v3.15" from Kukjin Kim:

- add DT entry for AHCI SATA and SATA PHY with using generic
  PHY framework for exynos5250 and arndale, smdk5250 boards.
- add SSS DT node for exynos5420 and exynos5250
- remove leftover spi0 node for smdk5250 board
- add ADC and thermistor nodes for exynos4412-trats2 board
- move common irq-combiner node for exynos4x12 from exynos4212
  and exynos4412
- add ADC, PMU and GPS_ALIVE power domain nodes for exynos4x12

Note that based on previous tags/samsung-dt and tags/exynos-clk

* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung

:
  ARM: dts: enable ahci sata and sata phy for exynos5250
  ARM: dts: add dt node for sss module for exynos5250/5420
  ARM: dts: Remove leftover spi0 node for smdk5250
  ARM: dts: Add ADC and themistor nodes for exynos4412-trats2
  ARM: dts: Move common dt data for interrupt combiner controller for exynos4x12
  ARM: dts: Add GPS_ALIVE power domain for exynos4x12
  ARM: dts: Add PMU dt data to support PMU for exynos4x12
  ARM: dts: Add ADC's dt data to read raw data for exynos4x12

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2b23e9a5 ba0d7ed3

Documentation/devicetree/bindings/ata/exynos-sata-phy.txt

deleted100644 → 0
+0 −14
Original line number Diff line number Diff line 
* Samsung SATA PHY Controller



SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.

Each SATA PHY controller should have its own node.



Required properties:

- compatible        : compatible list, contains "samsung,exynos5-sata-phy"

- reg               : <registers mapping>



Example:

        sata@ffe07000 {

                compatible = "samsung,exynos5-sata-phy";

                reg = <0xffe07000 0x1000>;

        };

Documentation/devicetree/bindings/ata/exynos-sata.txt

+16 −9
Original line number Diff line number Diff line
@@ -8,10 +8,17 @@ Required properties: 
- interrupts		: <interrupt mapping for SATA IRQ>

- reg			: <registers mapping>

- samsung,sata-freq	: <frequency in MHz>

- phys			: as mentioned in phy-bindings.txt

- phy-names		: as mentioned in phy-bindings.txt



Example:

        sata@ffe08000 {

                compatible = "samsung,exynos5-sata";

                reg = <0xffe08000 0x1000>;

                interrupts = <115>;

	sata@122f0000 {

		compatible = "snps,dwc-ahci";

		samsung,sata-freq = <66>;

		reg = <0x122f0000 0x1ff>;

		interrupts = <0 115 0>;

		clocks = <&clock 277>, <&clock 143>;

		clock-names = "sata", "sclk_sata";

		phys = <&sata_phy>;

		phy-names = "sata-phy";

	};

Documentation/devicetree/bindings/phy/samsung-phy.txt

+36 −0
Original line number Diff line number Diff line
@@ -20,3 +20,39 @@ Required properties: 
- compatible : should be "samsung,exynos5250-dp-video-phy";

- reg : offset and length of the Display Port PHY register set;

- #phy-cells : from the generic PHY bindings, must be 0;



Samsung SATA PHY Controller

---------------------------



SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.

Each SATA PHY controller should have its own node.



Required properties:

- compatible        : compatible list, contains "samsung,exynos5250-sata-phy"

- reg : offset and length of the SATA PHY register set;

- #phy-cells : from the generic phy bindings;



Example:

	sata_phy: sata-phy@12170000 {

		compatible = "samsung,exynos5250-sata-phy";

		reg = <0x12170000 0x1ff>;

		clocks = <&clock 287>;

		clock-names = "sata_phyctrl";

		#phy-cells = <0>;

		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;

		samsung,syscon-phandle = <&pmu_syscon>;

	};



Device-Tree bindings for sataphy i2c client driver

--------------------------------------------------



Required properties:

compatible: Should be "samsung,exynos-sataphy-i2c"

- reg: I2C address of the sataphy i2c device.



Example:



	sata_phy_i2c:sata-phy@38 {

		compatible = "samsung,exynos-sataphy-i2c";

		reg = <0x38>;

	};

arch/arm/boot/dts/exynos4.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -86,6 +86,11 @@ 
		reg = <0x10023CE0 0x20>;

	};



	pd_gps_alive: gps-alive-power-domain@10023D00 {

		compatible = "samsung,exynos4210-pd";

		reg = <0x10023D00 0x20>;

	};



	gic: interrupt-controller@10490000 {

		compatible = "arm,cortex-a9-gic";

		#interrupt-cells = <3>;

arch/arm/boot/dts/exynos4212.dtsi

+4 −9
Original line number Diff line number Diff line
@@ -22,16 +22,11 @@ 
/ {

	compatible = "samsung,exynos4212";



	gic: interrupt-controller@10490000 {

		cpu-offset = <0x8000>;

	combiner: interrupt-controller@10440000 {

		samsung,combiner-nr = <18>;

	};



	interrupt-controller@10440000 {

		samsung,combiner-nr = <18>;

		interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,

			     <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,

			     <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,

			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,

			     <0 107 0>, <0 108 0>;

	gic: interrupt-controller@10490000 {

		cpu-offset = <0x8000>;

	};

};