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Commit ba0d7ed3 authored by Yuvaraj Kumar C D's avatar Yuvaraj Kumar C D Committed by Kukjin Kim
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ARM: dts: enable ahci sata and sata phy for exynos5250 



This patch adds dt entry for ahci sata controller and its
corresponding phy controller.phy node has been added w.r.t
new generic phy framework.

Signed-off-by: default avatarYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 183af252

Documentation/devicetree/bindings/ata/exynos-sata-phy.txt

deleted100644 → 0
+0 −14
Original line number Diff line number Diff line 
* Samsung SATA PHY Controller



SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.

Each SATA PHY controller should have its own node.



Required properties:

- compatible        : compatible list, contains "samsung,exynos5-sata-phy"

- reg               : <registers mapping>



Example:

        sata@ffe07000 {

                compatible = "samsung,exynos5-sata-phy";

                reg = <0xffe07000 0x1000>;

        };

Documentation/devicetree/bindings/ata/exynos-sata.txt

+16 −9
Original line number Diff line number Diff line
@@ -8,10 +8,17 @@ Required properties: 
- interrupts		: <interrupt mapping for SATA IRQ>

- reg			: <registers mapping>

- samsung,sata-freq	: <frequency in MHz>

- phys			: as mentioned in phy-bindings.txt

- phy-names		: as mentioned in phy-bindings.txt



Example:

        sata@ffe08000 {

                compatible = "samsung,exynos5-sata";

                reg = <0xffe08000 0x1000>;

                interrupts = <115>;

	sata@122f0000 {

		compatible = "snps,dwc-ahci";

		samsung,sata-freq = <66>;

		reg = <0x122f0000 0x1ff>;

		interrupts = <0 115 0>;

		clocks = <&clock 277>, <&clock 143>;

		clock-names = "sata", "sclk_sata";

		phys = <&sata_phy>;

		phy-names = "sata-phy";

	};

Documentation/devicetree/bindings/phy/samsung-phy.txt

+36 −0
Original line number Diff line number Diff line
@@ -20,3 +20,39 @@ Required properties: 
- compatible : should be "samsung,exynos5250-dp-video-phy";

- reg : offset and length of the Display Port PHY register set;

- #phy-cells : from the generic PHY bindings, must be 0;



Samsung SATA PHY Controller

---------------------------



SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.

Each SATA PHY controller should have its own node.



Required properties:

- compatible        : compatible list, contains "samsung,exynos5250-sata-phy"

- reg : offset and length of the SATA PHY register set;

- #phy-cells : from the generic phy bindings;



Example:

	sata_phy: sata-phy@12170000 {

		compatible = "samsung,exynos5250-sata-phy";

		reg = <0x12170000 0x1ff>;

		clocks = <&clock 287>;

		clock-names = "sata_phyctrl";

		#phy-cells = <0>;

		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;

		samsung,syscon-phandle = <&pmu_syscon>;

	};



Device-Tree bindings for sataphy i2c client driver

--------------------------------------------------



Required properties:

compatible: Should be "samsung,exynos-sataphy-i2c"

- reg: I2C address of the sataphy i2c device.



Example:



	sata_phy_i2c:sata-phy@38 {

		compatible = "samsung,exynos-sataphy-i2c";

		reg = <0x38>;

	};

arch/arm/boot/dts/exynos5250-arndale.dts

+21 −0
Original line number Diff line number Diff line
@@ -374,6 +374,27 @@ 
		};

	};



	i2c@121D0000 {

		status = "okay";

		samsung,i2c-sda-delay = <100>;

		samsung,i2c-max-bus-freq = <40000>;

		samsung,i2c-slave-addr = <0x38>;



		sata_phy_i2c:sata-phy@38 {

			compatible = "samsung,exynos-sataphy-i2c";

			reg = <0x38>;

		};

	};



	sata@122F0000 {

		status = "okay";

	};



	sata-phy@12170000 {

		status = "okay";

		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;

	};



	mmc_0: mmc@12200000 {

		status = "okay";

		num-slots = <1>;

arch/arm/boot/dts/exynos5250-smdk5250.dts

+11 −6
Original line number Diff line number Diff line
@@ -242,16 +242,12 @@ 
		samsung,i2c-slave-addr = <0x38>;

		status = "okay";



		sata-phy {

			compatible = "samsung,sata-phy";

		sata_phy_i2c:sata-phy@38 {

			compatible = "samsung,exynos-sataphy-i2c";

			reg = <0x38>;

		};

	};



	sata@122F0000 {

		samsung,sata-freq = <66>;

	};



	i2c@12C80000 {

		samsung,i2c-sda-delay = <100>;

		samsung,i2c-max-bus-freq = <66000>;
@@ -274,6 +270,15 @@ 
		};

	};



	sata@122F0000 {

		status = "okay";

	};



	sata-phy@12170000 {

		status = "okay";

		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;

	};



	mmc@12200000 {

		status = "okay";

		num-slots = <1>;