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Commit cb1fbad7 authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

Merge branches '3.14/fbdev', '3.14/dss-misc' and '3.14/dss-fclk' into for-next 

Merge fbdev topic branches
parents 073bf172 e4998634 fc1fe6e7

drivers/video/omap2/displays-new/panel-sony-acx565akm.c

+30 −14
Original line number Diff line number Diff line
@@ -346,28 +346,22 @@ static int acx565akm_get_actual_brightness(struct panel_drv_data *ddata) 
static int acx565akm_bl_update_status(struct backlight_device *dev)

{

	struct panel_drv_data *ddata = dev_get_drvdata(&dev->dev);

	int r;

	int level;



	dev_dbg(&ddata->spi->dev, "%s\n", __func__);



	mutex_lock(&ddata->mutex);



	if (dev->props.fb_blank == FB_BLANK_UNBLANK &&

			dev->props.power == FB_BLANK_UNBLANK)

		level = dev->props.brightness;

	else

		level = 0;



	r = 0;

	if (ddata->has_bc)

		acx565akm_set_brightness(ddata, level);

	else

		r = -ENODEV;



	mutex_unlock(&ddata->mutex);

		return -ENODEV;



	return r;

	return 0;

}



static int acx565akm_bl_get_intensity(struct backlight_device *dev)
@@ -390,9 +384,33 @@ static int acx565akm_bl_get_intensity(struct backlight_device *dev) 
	return 0;

}



static int acx565akm_bl_update_status_locked(struct backlight_device *dev)

{

	struct panel_drv_data *ddata = dev_get_drvdata(&dev->dev);

	int r;



	mutex_lock(&ddata->mutex);

	r = acx565akm_bl_update_status(dev);

	mutex_unlock(&ddata->mutex);



	return r;

}



static int acx565akm_bl_get_intensity_locked(struct backlight_device *dev)

{

	struct panel_drv_data *ddata = dev_get_drvdata(&dev->dev);

	int r;



	mutex_lock(&ddata->mutex);

	r = acx565akm_bl_get_intensity(dev);

	mutex_unlock(&ddata->mutex);



	return r;

}



static const struct backlight_ops acx565akm_bl_ops = {

	.get_brightness = acx565akm_bl_get_intensity,

	.update_status  = acx565akm_bl_update_status,

	.get_brightness = acx565akm_bl_get_intensity_locked,

	.update_status  = acx565akm_bl_update_status_locked,

};



/*--------------------Auto Brightness control via Sysfs---------------------*/
@@ -526,8 +544,6 @@ static int acx565akm_panel_power_on(struct omap_dss_device *dssdev) 
	struct omap_dss_device *in = ddata->in;

	int r;



	mutex_lock(&ddata->mutex);



	dev_dbg(&ddata->spi->dev, "%s\n", __func__);



	in->ops.sdi->set_timings(in, &ddata->videomode);
@@ -568,8 +584,6 @@ static int acx565akm_panel_power_on(struct omap_dss_device *dssdev) 
	set_display_state(ddata, 1);

	set_cabc_mode(ddata, ddata->cabc_mode);



	mutex_unlock(&ddata->mutex);



	return acx565akm_bl_update_status(ddata->bl_dev);

}
@@ -616,7 +630,9 @@ static int acx565akm_enable(struct omap_dss_device *dssdev) 
	if (omapdss_device_is_enabled(dssdev))

		return 0;



	mutex_lock(&ddata->mutex);

	r = acx565akm_panel_power_on(dssdev);

	mutex_unlock(&ddata->mutex);

	if (r)

		return r;

drivers/video/omap2/dss/apply.c

+7 −4
Original line number Diff line number Diff line
@@ -149,6 +149,9 @@ static void apply_init_priv(void) 


		op = &dss_data.ovl_priv_data_array[i];



		op->info.color_mode = OMAP_DSS_COLOR_RGB16;

		op->info.rotation_type = OMAP_DSS_ROT_DMA;



		op->info.global_alpha = 255;



		switch (i) {
@@ -629,7 +632,7 @@ static void dss_ovl_write_regs(struct omap_overlay *ovl) 
	struct mgr_priv_data *mp;

	int r;



	DSSDBG("writing ovl %d regs", ovl->id);

	DSSDBG("writing ovl %d regs\n", ovl->id);



	if (!op->enabled || !op->info_dirty)

		return;
@@ -664,7 +667,7 @@ static void dss_ovl_write_regs_extra(struct omap_overlay *ovl) 
	struct ovl_priv_data *op = get_ovl_priv(ovl);

	struct mgr_priv_data *mp;



	DSSDBG("writing ovl %d regs extra", ovl->id);

	DSSDBG("writing ovl %d regs extra\n", ovl->id);



	if (!op->extra_info_dirty)

		return;
@@ -687,7 +690,7 @@ static void dss_mgr_write_regs(struct omap_overlay_manager *mgr) 
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

	struct omap_overlay *ovl;



	DSSDBG("writing mgr %d regs", mgr->id);

	DSSDBG("writing mgr %d regs\n", mgr->id);



	if (!mp->enabled)

		return;
@@ -713,7 +716,7 @@ static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr) 
{

	struct mgr_priv_data *mp = get_mgr_priv(mgr);



	DSSDBG("writing mgr %d regs extra", mgr->id);

	DSSDBG("writing mgr %d regs extra\n", mgr->id);



	if (!mp->extra_info_dirty)

		return;

drivers/video/omap2/dss/dispc.c

+46 −9
Original line number Diff line number Diff line
@@ -90,6 +90,8 @@ struct dispc_features { 


	/* revert to the OMAP4 mechanism of DISPC Smart Standby operation */

	bool mstandby_workaround:1;



	bool set_max_preload:1;

};



#define DISPC_MAX_NR_FIFOS 5
@@ -1200,7 +1202,17 @@ void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) 
	dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane),

			FLD_VAL(high, hi_start, hi_end) |

			FLD_VAL(low, lo_start, lo_end));



	/*

	 * configure the preload to the pipeline's high threhold, if HT it's too

	 * large for the preload field, set the threshold to the maximum value

	 * that can be held by the preload register

	 */

	if (dss_has_feature(FEAT_PRELOAD) && dispc.feat->set_max_preload &&

			plane != OMAP_DSS_WB)

		dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu));

}

EXPORT_SYMBOL(dispc_ovl_set_fifo_threshold);



void dispc_enable_fifomerge(bool enable)

{
@@ -1259,6 +1271,7 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, 
		*fifo_high = total_fifo_size - buf_unit;

	}

}

EXPORT_SYMBOL(dispc_ovl_compute_fifo_thresholds);



static void dispc_ovl_set_fir(enum omap_plane plane,

				int hinc, int vinc,
@@ -1988,7 +2001,8 @@ static void calc_tiler_rotation_offset(u16 screen_width, u16 width, 
 */

static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk,

		const struct omap_video_timings *t, u16 pos_x,

		u16 width, u16 height, u16 out_width, u16 out_height)

		u16 width, u16 height, u16 out_width, u16 out_height,

		bool five_taps)

{

	const int ds = DIV_ROUND_UP(height, out_height);

	unsigned long nonactive;
@@ -2008,6 +2022,10 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, 
	if (blank <= limits[i])

		return -EINVAL;



	/* FIXME add checks for 3-tap filter once the limitations are known */

	if (!five_taps)

		return 0;



	/*

	 * Pixel data should be prepared before visible display point starts.

	 * So, atleast DS-2 lines must have already been fetched by DISPC
@@ -2183,22 +2201,30 @@ static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, 
	do {

		in_height = DIV_ROUND_UP(height, *decim_y);

		in_width = DIV_ROUND_UP(width, *decim_x);

		*core_clk = calc_core_clk_five_taps(pclk, mgr_timings,

			in_width, in_height, out_width, out_height, color_mode);



		error = check_horiz_timing_omap3(pclk, lclk, mgr_timings,

				pos_x, in_width, in_height, out_width,

				out_height);

		*five_taps = in_height > out_height;



		if (in_width > maxsinglelinewidth)

			if (in_height > out_height &&

						in_height < out_height * 2)

				*five_taps = false;

		if (!*five_taps)

again:

		if (*five_taps)

			*core_clk = calc_core_clk_five_taps(pclk, mgr_timings,

						in_width, in_height, out_width,

						out_height, color_mode);

		else

			*core_clk = dispc.feat->calc_core_clk(pclk, in_width,

					in_height, out_width, out_height,

					mem_to_mem);



		error = check_horiz_timing_omap3(pclk, lclk, mgr_timings,

				pos_x, in_width, in_height, out_width,

				out_height, *five_taps);

		if (error && *five_taps) {

			*five_taps = false;

			goto again;

		}



		error = (error || in_width > maxsinglelinewidth * 2 ||

			(in_width > maxsinglelinewidth && *five_taps) ||

			!*core_clk || *core_clk > dispc_core_clk_rate());
@@ -2215,7 +2241,7 @@ static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, 
	} while (*decim_x <= *x_predecim && *decim_y <= *y_predecim && error);



	if (check_horiz_timing_omap3(pclk, lclk, mgr_timings, pos_x, width,

				height, out_width, out_height)){

				height, out_width, out_height, *five_taps)) {

			DSSERR("horizontal timing too tight\n");

			return -EINVAL;

	}
@@ -3211,6 +3237,8 @@ static void dispc_dump_regs(struct seq_file *s) 
		DUMPREG(DISPC_CONTROL3);

		DUMPREG(DISPC_CONFIG3);

	}

	if (dss_has_feature(FEAT_MFLAG))

		DUMPREG(DISPC_GLOBAL_MFLAG_ATTRIBUTE);



#undef DUMPREG
@@ -3285,6 +3313,8 @@ static void dispc_dump_regs(struct seq_file *s) 
			DUMPREG(i, DISPC_OVL_ATTRIBUTES2);

		if (dss_has_feature(FEAT_PRELOAD))

			DUMPREG(i, DISPC_OVL_PRELOAD);

		if (dss_has_feature(FEAT_MFLAG))

			DUMPREG(i, DISPC_OVL_MFLAG_THRESHOLD);

	}



#undef DISPC_REG
@@ -3520,6 +3550,7 @@ static const struct dispc_features omap24xx_dispc_feats __initconst = { 
	.calc_core_clk		=	calc_core_clk_24xx,

	.num_fifos		=	3,

	.no_framedone_tv	=	true,

	.set_max_preload	=	false,

};



static const struct dispc_features omap34xx_rev1_0_dispc_feats __initconst = {
@@ -3539,6 +3570,7 @@ static const struct dispc_features omap34xx_rev1_0_dispc_feats __initconst = { 
	.calc_core_clk		=	calc_core_clk_34xx,

	.num_fifos		=	3,

	.no_framedone_tv	=	true,

	.set_max_preload	=	false,

};



static const struct dispc_features omap34xx_rev3_0_dispc_feats __initconst = {
@@ -3558,6 +3590,7 @@ static const struct dispc_features omap34xx_rev3_0_dispc_feats __initconst = { 
	.calc_core_clk		=	calc_core_clk_34xx,

	.num_fifos		=	3,

	.no_framedone_tv	=	true,

	.set_max_preload	=	false,

};



static const struct dispc_features omap44xx_dispc_feats __initconst = {
@@ -3577,6 +3610,7 @@ static const struct dispc_features omap44xx_dispc_feats __initconst = { 
	.calc_core_clk		=	calc_core_clk_44xx,

	.num_fifos		=	5,

	.gfx_fifo_workaround	=	true,

	.set_max_preload	=	true,

};



static const struct dispc_features omap54xx_dispc_feats __initconst = {
@@ -3597,6 +3631,7 @@ static const struct dispc_features omap54xx_dispc_feats __initconst = { 
	.num_fifos		=	5,

	.gfx_fifo_workaround	=	true,

	.mstandby_workaround	=	true,

	.set_max_preload	=	true,

};



static int __init dispc_init_features(struct platform_device *pdev)
@@ -3734,6 +3769,8 @@ static int dispc_runtime_suspend(struct device *dev) 


static int dispc_runtime_resume(struct device *dev)

{

	_omap_dispc_initial_config();



	dispc_restore_context();



	return 0;

drivers/video/omap2/dss/dispc.h

+20 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#define DISPC_CONTROL3                  0x0848

#define DISPC_CONFIG3                   0x084C

#define DISPC_MSTANDBY_CTRL		0x0858

#define DISPC_GLOBAL_MFLAG_ATTRIBUTE	0x085C



/* DISPC overlay registers */

#define DISPC_OVL_BA0(n)		(DISPC_OVL_BASE(n) + \
@@ -100,6 +101,8 @@ 
					DISPC_FIR_COEF_V2_OFFSET(n, i))

#define DISPC_OVL_PRELOAD(n)		(DISPC_OVL_BASE(n) + \

					DISPC_PRELOAD_OFFSET(n))

#define DISPC_OVL_MFLAG_THRESHOLD(n)	(DISPC_OVL_BASE(n) + \

					DISPC_MFLAG_THRESHOLD_OFFSET(n))



/* DISPC up/downsampling FIR filter coefficient structure */

struct dispc_coef {
@@ -894,4 +897,21 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) 
		return 0;

	}

}



static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane)

{

	switch (plane) {

	case OMAP_DSS_GFX:

		return 0x0860;

	case OMAP_DSS_VIDEO1:

		return 0x0864;

	case OMAP_DSS_VIDEO2:

		return 0x0868;

	case OMAP_DSS_VIDEO3:

		return 0x086c;

	default:

		BUG();

		return 0;

	}

}

#endif

drivers/video/omap2/dss/display-sysfs.c

+2 −2
Original line number Diff line number Diff line
@@ -277,7 +277,7 @@ static ssize_t display_wss_store(struct device *dev, 
	return size;

}



static DEVICE_ATTR(name, S_IRUGO, display_name_show, NULL);

static DEVICE_ATTR(display_name, S_IRUGO, display_name_show, NULL);

static DEVICE_ATTR(enabled, S_IRUGO|S_IWUSR,

		display_enabled_show, display_enabled_store);

static DEVICE_ATTR(tear_elim, S_IRUGO|S_IWUSR,
@@ -292,7 +292,7 @@ static DEVICE_ATTR(wss, S_IRUGO|S_IWUSR, 
		display_wss_show, display_wss_store);



static const struct attribute *display_sysfs_attrs[] = {

	&dev_attr_name.attr,

	&dev_attr_display_name.attr,

	&dev_attr_enabled.attr,

	&dev_attr_tear_elim.attr,

	&dev_attr_timings.attr,