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Commit fc1fe6e7 authored by Tomi Valkeinen's avatar Tomi Valkeinen
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OMAPDSS: add dedicated fck PLL support 



This patch adds support for SoCs that have a dedicated DSS PLL used for
DSS function clock.

If there is no dss parent clock defined, it is presumed that the
functionl clock rate can be set (almost) freely. The code calculates the
highest allowed fck rate, which when divided with some integer gives the
required pck.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 688af02d

drivers/video/omap2/dss/dss.c

+18 −9
Original line number Original line Diff line number Diff line
@@ -446,12 +446,20 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min, 
	unsigned long prate;

	unsigned long prate;

	unsigned m;

	unsigned m;





	fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);



	if (dss.parent_clk == NULL) {

	if (dss.parent_clk == NULL) {

		fck = clk_get_rate(dss.dss_clk);

		unsigned pckd;



		pckd = fck_hw_max / pck;



		fck = pck * pckd;



		fck = clk_round_rate(dss.dss_clk, fck);



		return func(fck, data);

		return func(fck, data);

	}

	}





	fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);

	fckd_hw_max = dss.feat->fck_div_max;

	fckd_hw_max = dss.feat->fck_div_max;





	m = dss.feat->dss_fck_multiplier;

	m = dss.feat->dss_fck_multiplier;
@@ -503,16 +511,17 @@ static int dss_setup_default_clock(void) 
	unsigned fck_div;

	unsigned fck_div;

	int r;

	int r;





	if (dss.parent_clk == NULL)

		return 0;



	max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);

	max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);





	if (dss.parent_clk == NULL) {

		fck = clk_round_rate(dss.dss_clk, max_dss_fck);

	} else {

		prate = clk_get_rate(dss.parent_clk);

		prate = clk_get_rate(dss.parent_clk);





		fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,

		fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,

				max_dss_fck);

				max_dss_fck);

		fck = prate / fck_div * dss.feat->dss_fck_multiplier;

		fck = prate / fck_div * dss.feat->dss_fck_multiplier;

	}





	r = dss_set_fck_rate(fck);

	r = dss_set_fck_rate(fck);

	if (r)

	if (r)