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Commit c707844d authored by Jaedon Shin's avatar Jaedon Shin Committed by Ralf Baechle
Browse files

MIPS: BMIPS: Add support GPIO device nodes 



Adds GPIO device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: default avatarJaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14001/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7bbe59dd

arch/mips/boot/dts/brcm/bcm7125.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -197,6 +197,18 @@ 
			status = "disabled";

		};



		upg_gio: gpio@406700 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x406700 0x80>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_irq0_intc>;

			interrupts = <6>;

			brcm,gpio-bank-widths = <32 32 32 18>;

		};



		ehci0: usb@488300 {

			compatible = "brcm,bcm7125-ehci", "generic-ehci";

			reg = <0x488300 0x100>;

arch/mips/boot/dts/brcm/bcm7346.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -232,6 +232,43 @@ 
			status = "disabled";

		};



		aon_pm_l2_intc: interrupt-controller@408440 {

			compatible = "brcm,l2-intc";

			reg = <0x408440 0x30>;

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;

			interrupts = <53>;

			brcm,irq-can-wake;

		};



		upg_gio: gpio@406700 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x406700 0x60>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_irq0_intc>;

			interrupts = <6>;

			brcm,gpio-bank-widths = <32 32 16>;

		};



		upg_gio_aon: gpio@408c00 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x408c00 0x60>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_aon_irq0_intc>;

			interrupts = <6>;

			interrupts-extended = <&upg_aon_irq0_intc 6>,

					      <&aon_pm_l2_intc 5>;

			wakeup-source;

			brcm,gpio-bank-widths = <27 32 2>;

		};



		enet0: ethernet@430000 {

			phy-mode = "internal";

			phy-handle = <&phy1>;

arch/mips/boot/dts/brcm/bcm7358.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -216,6 +216,43 @@ 
			status = "disabled";

		};



		aon_pm_l2_intc: interrupt-controller@408240 {

			compatible = "brcm,l2-intc";

			reg = <0x408240 0x30>;

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;

			interrupts = <50>;

			brcm,irq-can-wake;

		};



		upg_gio: gpio@406500 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x406500 0xa0>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_irq0_intc>;

			interrupts = <6>;

			brcm,gpio-bank-widths = <32 32 32 29 4>;

		};



		upg_gio_aon: gpio@408c00 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x408c00 0x60>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_aon_irq0_intc>;

			interrupts = <6>;

			interrupts-extended = <&upg_aon_irq0_intc 6>,

					      <&aon_pm_l2_intc 5>;

			wakeup-source;

			brcm,gpio-bank-widths = <21 32 2>;

		};



		enet0: ethernet@430000 {

			phy-mode = "internal";

			phy-handle = <&phy1>;

arch/mips/boot/dts/brcm/bcm7360.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -208,6 +208,43 @@ 
			status = "disabled";

		};



		aon_pm_l2_intc: interrupt-controller@408440 {

			compatible = "brcm,l2-intc";

			reg = <0x408440 0x30>;

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;

			interrupts = <50>;

			brcm,irq-can-wake;

		};



		upg_gio: gpio@406500 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x406500 0xa0>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_irq0_intc>;

			interrupts = <6>;

			brcm,gpio-bank-widths = <32 32 32 29 4>;

		};



		upg_gio_aon: gpio@408c00 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x408c00 0x60>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_aon_irq0_intc>;

			interrupts = <6>;

			interrupts-extended = <&upg_aon_irq0_intc 6>,

					      <&aon_pm_l2_intc 5>;

			wakeup-source;

			brcm,gpio-bank-widths = <21 32 2>;

		};



		enet0: ethernet@430000 {

			phy-mode = "internal";

			phy-handle = <&phy1>;

arch/mips/boot/dts/brcm/bcm7362.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -204,6 +204,43 @@ 
			status = "disabled";

		};



		aon_pm_l2_intc: interrupt-controller@408440 {

			compatible = "brcm,l2-intc";

			reg = <0x408440 0x30>;

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;

			interrupts = <50>;

			brcm,irq-can-wake;

		};



		upg_gio: gpio@406500 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x406500 0xa0>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_irq0_intc>;

			interrupts = <6>;

			brcm,gpio-bank-widths = <32 32 32 29 4>;

		};



		upg_gio_aon: gpio@408c00 {

			compatible = "brcm,brcmstb-gpio";

			reg = <0x408c00 0x60>;

			#gpio-cells = <2>;

			#interrupt-cells = <2>;

			gpio-controller;

			interrupt-controller;

			interrupt-parent = <&upg_aon_irq0_intc>;

			interrupts = <6>;

			interrupts-extended = <&upg_aon_irq0_intc 6>,

					      <&aon_pm_l2_intc 5>;

			wakeup-source;

			brcm,gpio-bank-widths = <21 32 2>;

		};



		enet0: ethernet@430000 {

			phy-mode = "internal";

			phy-handle = <&phy1>;