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Commit 7bbe59dd authored Aug 19, 2016 by Jaedon Shin Committed by Ralf Baechle Oct 06, 2016

MIPS: BMIPS: Add support PWM device nodes



Adds PWM device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14000/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent c834469b

arch/mips/boot/dts/brcm/bcm7125.dtsi

+14 −0

Original line number	Diff line number	Diff line
		@@ -40,6 +40,12 @@
		#clock-cells = <0>;
		clock-frequency = <81000000>;
		};

		upg_clk: upg_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		};
		};

		rdb {
		@@ -183,6 +189,14 @@
		status = "disabled";
		};

		pwma: pwm@406580 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406580 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		ehci0: usb@488300 {
		compatible = "brcm,bcm7125-ehci", "generic-ehci";
		reg = <0x488300 0x100>;

arch/mips/boot/dts/brcm/bcm7346.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -40,6 +40,12 @@
		#clock-cells = <0>;
		clock-frequency = <81000000>;
		};

		upg_clk: upg_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		};
		};

		rdb {
		@@ -210,6 +216,22 @@
		status = "disabled";
		};

		pwma: pwm@406580 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406580 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		pwmb: pwm@406800 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406800 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		enet0: ethernet@430000 {
		phy-mode = "internal";
		phy-handle = <&phy1>;

arch/mips/boot/dts/brcm/bcm7358.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -34,6 +34,12 @@
		#clock-cells = <0>;
		clock-frequency = <81000000>;
		};

		upg_clk: upg_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		};
		};

		rdb {
		@@ -194,6 +200,22 @@
		status = "disabled";
		};

		pwma: pwm@406400 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406400 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		pwmb: pwm@406700 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406700 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		enet0: ethernet@430000 {
		phy-mode = "internal";
		phy-handle = <&phy1>;

arch/mips/boot/dts/brcm/bcm7360.dtsi

+14 −0

Original line number	Diff line number	Diff line
		@@ -34,6 +34,12 @@
		#clock-cells = <0>;
		clock-frequency = <81000000>;
		};

		upg_clk: upg_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		};
		};

		rdb {
		@@ -194,6 +200,14 @@
		status = "disabled";
		};

		pwma: pwm@406400 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406400 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		enet0: ethernet@430000 {
		phy-mode = "internal";
		phy-handle = <&phy1>;

arch/mips/boot/dts/brcm/bcm7362.dtsi

+14 −0

Original line number	Diff line number	Diff line
		@@ -40,6 +40,12 @@
		#clock-cells = <0>;
		clock-frequency = <81000000>;
		};

		upg_clk: upg_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		};
		};

		rdb {
		@@ -190,6 +196,14 @@
		status = "disabled";
		};

		pwma: pwm@406400 {
		compatible = "brcm,bcm7038-pwm";
		reg = <0x406400 0x28>;
		#pwm-cells = <2>;
		clocks = <&upg_clk>;
		status = "disabled";
		};

		enet0: ethernet@430000 {
		phy-mode = "internal";
		phy-handle = <&phy1>;