Loading dp/wifi3.0/dp_rx.c +1 −0 Original line number Diff line number Diff line Loading @@ -2051,6 +2051,7 @@ uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl, rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc); status = dp_rx_cookie_check_and_invalidate(ring_desc); if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) { DP_STATS_INC(soc, rx.err.stale_cookie, 1); break; } Loading dp/wifi3.0/dp_stats.c +5 −0 Original line number Diff line number Diff line Loading @@ -5541,6 +5541,8 @@ void dp_txrx_path_stats(struct dp_soc *soc) pdev->soc->stats.rx.err.pkt_delivered_no_peer); DP_PRINT_STATS("RX invalid cookie: %d", soc->stats.rx.err.invalid_cookie); DP_PRINT_STATS("RX stale cookie: %d", soc->stats.rx.err.stale_cookie); DP_PRINT_STATS("2k jump delba sent: %u", pdev->soc->stats.rx.err.rx_2k_jump_delba_sent); DP_PRINT_STATS("2k jump msdu to stack: %u", Loading Loading @@ -6072,6 +6074,9 @@ dp_print_soc_rx_stats(struct dp_soc *soc) DP_PRINT_STATS("RX invalid cookie: %d", soc->stats.rx.err.invalid_cookie); DP_PRINT_STATS("RX stale cookie: %d", soc->stats.rx.err.stale_cookie); DP_PRINT_STATS("RX wait completed msdu break: %d", soc->stats.rx.msdu_scatter_wait_break); Loading dp/wifi3.0/dp_types.h +2 −0 Original line number Diff line number Diff line Loading @@ -813,6 +813,8 @@ struct dp_soc_stats { uint32_t scatter_msdu; /* RX msdu drop count due to invalid cookie */ uint32_t invalid_cookie; /* Count of stale cookie read in RX path */ uint32_t stale_cookie; /* Delba sent count due to RX 2k jump */ uint32_t rx_2k_jump_delba_sent; /* RX 2k jump msdu indicated to stack count */ Loading hal/wifi3.0/hal_api.h +45 −0 Original line number Diff line number Diff line Loading @@ -527,6 +527,51 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset) } #endif /* Max times allowed for register writing retry */ #define HAL_REG_WRITE_RETRY_MAX 5 /* Delay milliseconds for each time retry */ #define HAL_REG_WRITE_RETRY_DELAY 1 /** * hal_write32_mb_confirm_retry() - write register with confirming and do retry/recovery if writing failed * @hal_soc: hal soc handle * @offset: offset address from the BAR * @value: value to write * @recovery: is recovery needed or not. * * Write the register value with confirming and read it back, if * read back value is not as expected, do retry for writing, if * retry hit max times allowed but still fail, check if recovery * needed. * * Return: None */ static inline void hal_write32_mb_confirm_retry(struct hal_soc *hal_soc, uint32_t offset, uint32_t value, bool recovery) { uint8_t retry_cnt = 0; uint32_t read_value; while (retry_cnt <= HAL_REG_WRITE_RETRY_MAX) { hal_write32_mb_confirm(hal_soc, offset, value); read_value = hal_read32_mb(hal_soc, offset); if (qdf_likely(read_value == value)) break; /* write failed, do retry */ hal_warn("Retry reg offset 0x%x, value 0x%x, read value 0x%x", offset, value, read_value); qdf_mdelay(HAL_REG_WRITE_RETRY_DELAY); retry_cnt++; } if (retry_cnt > HAL_REG_WRITE_RETRY_MAX && recovery) qdf_trigger_self_recovery(NULL, QDF_HAL_REG_WRITE_FAILURE); } #ifdef FEATURE_HAL_DELAYED_REG_WRITE /** * hal_dump_reg_write_srng_stats() - dump SRNG reg write stats Loading hal/wifi3.0/hal_hw_headers.h +3 −0 Original line number Diff line number Diff line Loading @@ -116,6 +116,9 @@ #define HAL_REG_WRITE_CONFIRM(_soc, _reg, _value) \ hal_write32_mb_confirm(_soc, (_reg), (_value)) #define HAL_REG_WRITE_CONFIRM_RETRY(_soc, _reg, _value, _recovery) \ hal_write32_mb_confirm_retry(_soc, (_reg), (_value), (_recovery)) #define HAL_REG_READ(_soc, _offset) \ hal_read32_mb(_soc, (_offset)) Loading Loading
dp/wifi3.0/dp_rx.c +1 −0 Original line number Diff line number Diff line Loading @@ -2051,6 +2051,7 @@ uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl, rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc); status = dp_rx_cookie_check_and_invalidate(ring_desc); if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) { DP_STATS_INC(soc, rx.err.stale_cookie, 1); break; } Loading
dp/wifi3.0/dp_stats.c +5 −0 Original line number Diff line number Diff line Loading @@ -5541,6 +5541,8 @@ void dp_txrx_path_stats(struct dp_soc *soc) pdev->soc->stats.rx.err.pkt_delivered_no_peer); DP_PRINT_STATS("RX invalid cookie: %d", soc->stats.rx.err.invalid_cookie); DP_PRINT_STATS("RX stale cookie: %d", soc->stats.rx.err.stale_cookie); DP_PRINT_STATS("2k jump delba sent: %u", pdev->soc->stats.rx.err.rx_2k_jump_delba_sent); DP_PRINT_STATS("2k jump msdu to stack: %u", Loading Loading @@ -6072,6 +6074,9 @@ dp_print_soc_rx_stats(struct dp_soc *soc) DP_PRINT_STATS("RX invalid cookie: %d", soc->stats.rx.err.invalid_cookie); DP_PRINT_STATS("RX stale cookie: %d", soc->stats.rx.err.stale_cookie); DP_PRINT_STATS("RX wait completed msdu break: %d", soc->stats.rx.msdu_scatter_wait_break); Loading
dp/wifi3.0/dp_types.h +2 −0 Original line number Diff line number Diff line Loading @@ -813,6 +813,8 @@ struct dp_soc_stats { uint32_t scatter_msdu; /* RX msdu drop count due to invalid cookie */ uint32_t invalid_cookie; /* Count of stale cookie read in RX path */ uint32_t stale_cookie; /* Delba sent count due to RX 2k jump */ uint32_t rx_2k_jump_delba_sent; /* RX 2k jump msdu indicated to stack count */ Loading
hal/wifi3.0/hal_api.h +45 −0 Original line number Diff line number Diff line Loading @@ -527,6 +527,51 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset) } #endif /* Max times allowed for register writing retry */ #define HAL_REG_WRITE_RETRY_MAX 5 /* Delay milliseconds for each time retry */ #define HAL_REG_WRITE_RETRY_DELAY 1 /** * hal_write32_mb_confirm_retry() - write register with confirming and do retry/recovery if writing failed * @hal_soc: hal soc handle * @offset: offset address from the BAR * @value: value to write * @recovery: is recovery needed or not. * * Write the register value with confirming and read it back, if * read back value is not as expected, do retry for writing, if * retry hit max times allowed but still fail, check if recovery * needed. * * Return: None */ static inline void hal_write32_mb_confirm_retry(struct hal_soc *hal_soc, uint32_t offset, uint32_t value, bool recovery) { uint8_t retry_cnt = 0; uint32_t read_value; while (retry_cnt <= HAL_REG_WRITE_RETRY_MAX) { hal_write32_mb_confirm(hal_soc, offset, value); read_value = hal_read32_mb(hal_soc, offset); if (qdf_likely(read_value == value)) break; /* write failed, do retry */ hal_warn("Retry reg offset 0x%x, value 0x%x, read value 0x%x", offset, value, read_value); qdf_mdelay(HAL_REG_WRITE_RETRY_DELAY); retry_cnt++; } if (retry_cnt > HAL_REG_WRITE_RETRY_MAX && recovery) qdf_trigger_self_recovery(NULL, QDF_HAL_REG_WRITE_FAILURE); } #ifdef FEATURE_HAL_DELAYED_REG_WRITE /** * hal_dump_reg_write_srng_stats() - dump SRNG reg write stats Loading
hal/wifi3.0/hal_hw_headers.h +3 −0 Original line number Diff line number Diff line Loading @@ -116,6 +116,9 @@ #define HAL_REG_WRITE_CONFIRM(_soc, _reg, _value) \ hal_write32_mb_confirm(_soc, (_reg), (_value)) #define HAL_REG_WRITE_CONFIRM_RETRY(_soc, _reg, _value, _recovery) \ hal_write32_mb_confirm_retry(_soc, (_reg), (_value), (_recovery)) #define HAL_REG_READ(_soc, _offset) \ hal_read32_mb(_soc, (_offset)) Loading