Merge "ARM: dts: msm: Add reset clocks for kona" (c45faa06) · Commits · e / devices / android_kernel_oneplus_sm7250

arch/arm64/boot/dts/qcom/kona-vidc.dtsi

+3 −0

Original line number	Diff line number	Diff line
		@@ -38,6 +38,9 @@
		qcom,clock-configs = <0x0 0x0 0x0 0x1 0x1>;
		qcom,allowed-clock-rates = <240000000 338000000
		366000000 444000000>;
		resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>,
		<&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>;
		reset-names = "video_axi_reset", "video_core_reset";

		/* Buses */
		bus_cnoc {

drivers/media/platform/msm/vidc/hfi_packetization.c

+46 −0

Original line number	Diff line number	Diff line
		@@ -325,6 +325,51 @@ inline int create_pkt_cmd_sys_session_init(
		return rc;
		}


		int create_pkt_cmd_sys_ubwc_config(
		struct hfi_cmd_sys_set_property_packet *pkt,
		struct msm_vidc_ubwc_config_data *ubwc_config)
		{
		int rc = 0;
		struct hfi_cmd_sys_set_ubwc_config_packet_type *hfi;

		if (!pkt)
		return -EINVAL;

		pkt->size = sizeof(struct hfi_cmd_sys_set_property_packet) +
		sizeof(struct hfi_cmd_sys_set_ubwc_config_packet_type)
		+ sizeof(u32);

		pkt->packet_type = HFI_CMD_SYS_SET_PROPERTY;
		pkt->num_properties = 1;
		pkt->rg_property_data[0] = HFI_PROPERTY_SYS_UBWC_CONFIG;
		hfi = (struct hfi_cmd_sys_set_ubwc_config_packet_type *)
		&pkt->rg_property_data[1];

		hfi->max_channels = ubwc_config->max_channels;
		hfi->override_bit_info.max_channel_override =
		ubwc_config->override_bit_info.max_channel_override;

		hfi->mal_length = ubwc_config->mal_length;
		hfi->override_bit_info.mal_length_override =
		ubwc_config->override_bit_info.mal_length_override;

		hfi->highest_bank_bit = ubwc_config->highest_bank_bit;
		hfi->override_bit_info.hb_override =
		ubwc_config->override_bit_info.hb_override;

		hfi->bank_swzl_level = ubwc_config->bank_swzl_level;
		hfi->override_bit_info.bank_swzl_level_override =
		ubwc_config->override_bit_info.bank_swzl_level_override;

		hfi->bank_spreading = ubwc_config->bank_spreading;
		hfi->override_bit_info.bank_spreading_override =
		ubwc_config->override_bit_info.bank_spreading_override;

		return rc;
		}


		int create_pkt_cmd_session_cmd(struct vidc_hal_session_cmd_pkt *pkt,
		int pkt_type, struct hal_session *session)
		{
		@@ -817,6 +862,7 @@ static struct hfi_packetization_ops hfi_default = {
		.sys_coverage_config = create_pkt_cmd_sys_coverage_config,
		.sys_release_resource = create_pkt_cmd_sys_release_resource,
		.sys_image_version = create_pkt_cmd_sys_image_version,
		.sys_ubwc_config = create_pkt_cmd_sys_ubwc_config,
		.ssr_cmd = create_pkt_ssr_cmd,
		.session_init = create_pkt_cmd_sys_session_init,
		.session_cmd = create_pkt_cmd_session_cmd,

drivers/media/platform/msm/vidc/hfi_packetization.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -35,6 +35,8 @@ struct hfi_packetization_ops {
		struct hfi_cmd_sys_release_resource_packet *pkt,
		struct vidc_resource_hdr *resource_hdr);
		int (sys_image_version)(struct hfi_cmd_sys_get_property_packet pkt);
		int (sys_ubwc_config)(struct hfi_cmd_sys_set_property_packet pkt,
		struct msm_vidc_ubwc_config_data *ubwc_config);
		int (*ssr_cmd)(enum hal_ssr_trigger_type type,
		struct hfi_cmd_sys_test_ssr_packet *pkt);
		int (*session_init)(

drivers/media/platform/msm/vidc/msm_vidc_internal.h

+18 −2

Original line number	Diff line number	Diff line
		@@ -226,6 +226,23 @@ enum vpu_version {
		VPU_VERSION_IRIS2,
		};

		struct msm_vidc_ubwc_config_data {
		struct {
		u32 max_channel_override : 1;
		u32 mal_length_override : 1;
		u32 hb_override : 1;
		u32 bank_swzl_level_override : 1;
		u32 bank_spreading_override : 1;
		u32 reserved : 27;
		} override_bit_info;

		u32 max_channels;
		u32 mal_length;
		u32 highest_bank_bit;
		u32 bank_swzl_level;
		u32 bank_spreading;
		};

		struct msm_vidc_platform_data {
		struct msm_vidc_common_data *common_data;
		unsigned int common_data_length;
		@@ -235,9 +252,8 @@ struct msm_vidc_platform_data {
		struct msm_vidc_efuse_data *efuse_data;
		unsigned int efuse_data_length;
		unsigned int sku_version;
		phys_addr_t gcc_register_base;
		uint32_t gcc_register_size;
		uint32_t vpu_ver;
		struct msm_vidc_ubwc_config_data *ubwc_config;
		};

		struct msm_vidc_format {

drivers/media/platform/msm/vidc/msm_vidc_platform.c

+46 −15

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
		* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
		*/

		#include <linux/debugfs.h>
		@@ -15,10 +15,16 @@
		#include <linux/types.h>
		#include <linux/version.h>
		#include <linux/io.h>
		#include <linux/of_fdt.h>
		#include "msm_vidc_internal.h"
		#include "msm_vidc_debug.h"


		#define DDR_TYPE_LPDDR4 0x6
		#define DDR_TYPE_LPDDR4X 0x7
		#define DDR_TYPE_LPDDR4Y 0x8
		#define DDR_TYPE_LPDDR5 0x9

		#define CODEC_ENTRY(n, p, vsp, vpp, lp) \
		{ \
		.fourcc = n, \
		@@ -37,8 +43,20 @@
		.purpose = p \
		}

		#define GCC_VIDEO_AXI_REG_START_ADDR 0x10B024
		#define GCC_VIDEO_AXI_REG_SIZE 0xC
		#define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \
		{ \
		.override_bit_info.max_channel_override = mco, \
		.override_bit_info.mal_length_override = mlo, \
		.override_bit_info.hb_override = hbo, \
		.override_bit_info.bank_swzl_level_override = bslo, \
		.override_bit_info.bank_spreading_override = bso, \
		.override_bit_info.reserved = rs, \
		.max_channels = mc, \
		.mal_length = ml, \
		.highest_bank_bit = hbb, \
		.bank_swzl_level = bsl, \
		.bank_spreading = bsp, \
		}

		static struct msm_vidc_codec_data default_codec_data[] = {
		CODEC_ENTRY(V4L2_PIX_FMT_H264, MSM_VIDC_ENCODER, 125, 675, 320),
		@@ -514,6 +532,11 @@ static struct msm_vidc_efuse_data sdm670_efuse_data[] = {
		EFUSE_ENTRY(0x007801A0, 4, 0x00008000, 0x0f, SKU_VERSION),
		};

		/* Default UBWC config for LPDDR5 */
		static struct msm_vidc_ubwc_config_data kona_ubwc_data[] = {
		UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 15, 0, 0),
		};

		static struct msm_vidc_platform_data default_data = {
		.codec_data = default_codec_data,
		.codec_data_length = ARRAY_SIZE(default_codec_data),
		@@ -525,9 +548,8 @@ static struct msm_vidc_platform_data default_data = {
		.efuse_data = NULL,
		.efuse_data_length = 0,
		.sku_version = 0,
		.gcc_register_base = 0,
		.gcc_register_size = 0,
		.vpu_ver = VPU_VERSION_IRIS2,
		.ubwc_config = 0x0,
		};

		static struct msm_vidc_platform_data kona_data = {
		@@ -541,9 +563,8 @@ static struct msm_vidc_platform_data kona_data = {
		.efuse_data = NULL,
		.efuse_data_length = 0,
		.sku_version = 0,
		.gcc_register_base = 0x10B024,//GCC_VIDEO_AXI0_CBCR,
		.gcc_register_size = 0x8,//GCC_VIDEO_AXI0_CBCR + GCC_VIDEO_AXI1_CBCR,
		.vpu_ver = VPU_VERSION_IRIS2,
		.ubwc_config = kona_ubwc_data,
		};

		static struct msm_vidc_platform_data sm6150_data = {
		@@ -557,9 +578,8 @@ static struct msm_vidc_platform_data sm6150_data = {
		.efuse_data = NULL,
		.efuse_data_length = 0,
		.sku_version = 0,
		.gcc_register_base = 0,
		.gcc_register_size = 0,
		.vpu_ver = VPU_VERSION_AR50,
		.ubwc_config = 0x0,
		};

		static struct msm_vidc_platform_data sm8150_data = {
		@@ -573,9 +593,8 @@ static struct msm_vidc_platform_data sm8150_data = {
		.efuse_data = NULL,
		.efuse_data_length = 0,
		.sku_version = 0,
		.gcc_register_base = GCC_VIDEO_AXI_REG_START_ADDR,
		.gcc_register_size = GCC_VIDEO_AXI_REG_SIZE,
		.vpu_ver = VPU_VERSION_IRIS1,
		.ubwc_config = 0x0,
		};

		static struct msm_vidc_platform_data sdm845_data = {
		@@ -589,9 +608,8 @@ static struct msm_vidc_platform_data sdm845_data = {
		.efuse_data = NULL,
		.efuse_data_length = 0,
		.sku_version = 0,
		.gcc_register_base = 0,
		.gcc_register_size = 0,
		.vpu_ver = VPU_VERSION_AR50,
		.ubwc_config = 0x0,
		};

		static struct msm_vidc_platform_data sdm670_data = {
		@@ -605,9 +623,8 @@ static struct msm_vidc_platform_data sdm670_data = {
		.efuse_data = sdm670_efuse_data,
		.efuse_data_length = ARRAY_SIZE(sdm670_efuse_data),
		.sku_version = 0,
		.gcc_register_base = 0,
		.gcc_register_size = 0,
		.vpu_ver = VPU_VERSION_AR50,
		.ubwc_config = 0x0,
		};

		static const struct of_device_id msm_vidc_dt_match[] = {
		@@ -683,6 +700,7 @@ void vidc_get_drv_data(struct device dev)
		{
		struct msm_vidc_platform_data *driver_data = NULL;
		const struct of_device_id *match;
		uint32_t ddr_type = DDR_TYPE_LPDDR5;
		int rc = 0;

		if (!IS_ENABLED(CONFIG_OF) \|\| !dev->of_node) {
		@@ -708,6 +726,19 @@ void vidc_get_drv_data(struct device dev)
		driver_data->common_data_length =
		ARRAY_SIZE(sdm670_common_data_v1);
		}
		} else if (!strcmp(match->compatible, "qcom,kona-vidc")) {
		ddr_type = of_fdt_get_ddrtype();
		if (ddr_type == -ENOENT) {
		dprintk(VIDC_ERR,
		"Failed to get ddr type, use LPDDR5\n");
		}
		dprintk(VIDC_DBG, "DDR Type %x\n", ddr_type);

		if (driver_data->ubwc_config &&
		(ddr_type == DDR_TYPE_LPDDR4 \|\|
		ddr_type == DDR_TYPE_LPDDR4X \|\|
		ddr_type == DDR_TYPE_LPDDR4Y))
		driver_data->ubwc_config->highest_bank_bit = 0xf;
		}

		exit: