ARM: dts: msm: Add reset clocks for kona



The clocks are used to reset the ahb2axi bridge
in video hardware.

CRs-Fixed: 2384822
Change-Id: Ibf1ffc86fa20bc053668f4423f7a1404be15f0e1
Signed-off-by: Shivendra Kakrania <shiven@codeaurora.org>

parent cf8e23cc

arch/arm64/boot/dts/qcom/kona-vidc.dtsi

+3 −0

Original line number	Diff line number	Diff line
		@@ -38,6 +38,9 @@
		qcom,clock-configs = <0x0 0x0 0x0 0x1 0x1>;
		qcom,allowed-clock-rates = <240000000 338000000
		366000000 444000000>;
		resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>,
		<&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>;
		reset-names = "video_axi_reset", "video_core_reset";

		/* Buses */
		bus_cnoc {