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Commit b97186f0 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: add intel_display_power_enabled 



This should replace intel_using_power_well. The idea is that we're
adding the requested power domain as an argument, so this might enable
the code to look less platform-specific and also allows us to easily
add new domains in case we need.

v2: Add more domains to enum intel_display_power_domain
v3: Even more domains requested

Requested-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7df5080b

drivers/gpu/drm/i915/i915_drv.h

+18 −0
Original line number Diff line number Diff line
@@ -88,6 +88,24 @@ enum port { 
};

#define port_name(p) ((p) + 'A')



enum intel_display_power_domain {

	POWER_DOMAIN_PIPE_A,

	POWER_DOMAIN_PIPE_B,

	POWER_DOMAIN_PIPE_C,

	POWER_DOMAIN_PIPE_A_PANEL_FITTER,

	POWER_DOMAIN_PIPE_B_PANEL_FITTER,

	POWER_DOMAIN_PIPE_C_PANEL_FITTER,

	POWER_DOMAIN_TRANSCODER_A,

	POWER_DOMAIN_TRANSCODER_B,

	POWER_DOMAIN_TRANSCODER_C,

	POWER_DOMAIN_TRANSCODER_EDP = POWER_DOMAIN_TRANSCODER_A + 0xF,

};



#define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)

#define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \

		((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER)

#define POWER_DOMAIN_TRANSCODER(tran) ((tran) + POWER_DOMAIN_TRANSCODER_A)



enum hpd_pin {

	HPD_NONE = 0,

	HPD_PORT_A = HPD_NONE, /* PORT_A is internal */

drivers/gpu/drm/i915/intel_display.c

+6 −5
Original line number Diff line number Diff line
@@ -1110,8 +1110,8 @@ void assert_pipe(struct drm_i915_private *dev_priv, 
	if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)

		state = true;



	if (!intel_using_power_well(dev_priv->dev) &&

	    cpu_transcoder != TRANSCODER_EDP) {

	if (!intel_display_power_enabled(dev_priv->dev,

				POWER_DOMAIN_TRANSCODER(cpu_transcoder))) {

		cur_state = false;

	} else {

		reg = PIPECONF(cpu_transcoder);
@@ -3532,7 +3532,8 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) 
	/* XXX: Once we have proper panel fitter state tracking implemented with

	 * hardware state read/check support we should switch to only disable

	 * the panel fitter when we know it's used. */

	if (intel_using_power_well(dev)) {

	if (intel_display_power_enabled(dev,

					POWER_DOMAIN_PIPE_PANEL_FITTER(pipe))) {

		I915_WRITE(PF_CTL(pipe), 0);

		I915_WRITE(PF_WIN_SZ(pipe), 0);

	}
@@ -6039,8 +6040,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, 
	enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;

	uint32_t tmp;



	if (!intel_using_power_well(dev_priv->dev) &&

	    cpu_transcoder != TRANSCODER_EDP)

	if (!intel_display_power_enabled(dev,

			POWER_DOMAIN_TRANSCODER(cpu_transcoder)))

		return false;



	tmp = I915_READ(PIPECONF(cpu_transcoder));

drivers/gpu/drm/i915/intel_drv.h

+2 −1
Original line number Diff line number Diff line
@@ -754,7 +754,8 @@ extern void intel_update_fbc(struct drm_device *dev); 
extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);

extern void intel_gpu_ips_teardown(void);



extern bool intel_using_power_well(struct drm_device *dev);

extern bool intel_display_power_enabled(struct drm_device *dev,

					enum intel_display_power_domain domain);

extern void intel_init_power_well(struct drm_device *dev);

extern void intel_set_power_well(struct drm_device *dev, bool enable);

extern void intel_enable_gt_powersave(struct drm_device *dev);

drivers/gpu/drm/i915/intel_pm.c

+20 −4
Original line number Diff line number Diff line
@@ -4344,15 +4344,31 @@ void intel_init_clock_gating(struct drm_device *dev) 
 * enable it, so check if it's enabled and also check if we've requested it to

 * be enabled.

 */

bool intel_using_power_well(struct drm_device *dev)

bool intel_display_power_enabled(struct drm_device *dev,

				 enum intel_display_power_domain domain)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (IS_HASWELL(dev))

	if (!HAS_POWER_WELL(dev))

		return true;



	switch (domain) {

	case POWER_DOMAIN_PIPE_A:

	case POWER_DOMAIN_TRANSCODER_EDP:

		return true;

	case POWER_DOMAIN_PIPE_B:

	case POWER_DOMAIN_PIPE_C:

	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:

	case POWER_DOMAIN_PIPE_B_PANEL_FITTER:

	case POWER_DOMAIN_PIPE_C_PANEL_FITTER:

	case POWER_DOMAIN_TRANSCODER_A:

	case POWER_DOMAIN_TRANSCODER_B:

	case POWER_DOMAIN_TRANSCODER_C:

		return I915_READ(HSW_PWR_WELL_DRIVER) ==

		       (HSW_PWR_WELL_ENABLE | HSW_PWR_WELL_STATE);

	else

		return true;

	default:

		BUG();

	}

}



void intel_set_power_well(struct drm_device *dev, bool enable)