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Commit b52a0c2c authored by Abhishek Sahu's avatar Abhishek Sahu Committed by Stephen Boyd
Browse files

clk: qcom: ipq4019: correct sdcc frequency and parent name 



1. The parent for sdcc clock is sdccpll.
2. The frequency value was wrong so modified the same.

Signed-off-by: default avatarAbhishek Sahu <absahu@codeaurora.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 5c1a9693

drivers/clk/qcom/gcc-ipq4019.c

+2 −2
Original line number Diff line number Diff line
@@ -124,7 +124,7 @@ static struct parent_map gcc_xo_sdcc1_500_map[] = { 


static const char * const gcc_xo_sdcc1_500[] = {

	"xo",

	"ddrpll",

	"ddrpllsdcc",

	"fepll500",

};
@@ -549,7 +549,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = { 
	F(25000000,  P_FEPLL500,		1,  1, 20),

	F(50000000,  P_FEPLL500,		1,  1, 10),

	F(100000000, P_FEPLL500,		1,  1, 5),

	F(193000000, P_DDRPLL,		1,  0, 0),

	F(192000000, P_DDRPLL,			1,  0, 0),

	{ }

};