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Commit b2420e27 authored by Jaedon Shin's avatar Jaedon Shin Committed by Ralf Baechle
Browse files

MIPS: BMIPS: Add support SDHCI device nodes 



Adds SDHCI device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: default avatarJaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14002/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c707844d

arch/mips/boot/dts/brcm/bcm7346.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -411,5 +411,13 @@ 
				#phy-cells = <0>;

			};

		};



		sdhci0: sdhci@413500 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x413500 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <85>;

			status = "disabled";

		};

	};

};

arch/mips/boot/dts/brcm/bcm7360.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -330,5 +330,13 @@ 
				#phy-cells = <0>;

			};

		};



		sdhci0: sdhci@410000 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x410000 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <82>;

			status = "disabled";

		};

	};

};

arch/mips/boot/dts/brcm/bcm7362.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -326,5 +326,13 @@ 
				#phy-cells = <0>;

			};

		};



		sdhci0: sdhci@410000 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x410000 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <82>;

			status = "disabled";

		};

	};

};

arch/mips/boot/dts/brcm/bcm7425.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -410,5 +410,25 @@ 
				#phy-cells = <0>;

			};

		};



		sdhci0: sdhci@419000 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x419000 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <43>;

			sd-uhs-sdr50;

			mmc-hs200-1_8v;

			status = "disabled";

		};



		sdhci1: sdhci@419200 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x419200 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <44>;

			sd-uhs-sdr50;

			mmc-hs200-1_8v;

			status = "disabled";

		};

	};

};

arch/mips/boot/dts/brcm/bcm7435.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -425,5 +425,25 @@ 
				#phy-cells = <0>;

			};

		};



		sdhci0: sdhci@41a000 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x41a000 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <47>;

			sd-uhs-sdr50;

			mmc-hs200-1_8v;

			status = "disabled";

		};



		sdhci1: sdhci@41a200 {

			compatible = "brcm,bcm7425-sdhci";

			reg = <0x41a200 0x100>;

			interrupt-parent = <&periph_intc>;

			interrupts = <48>;

			sd-uhs-sdr50;

			mmc-hs200-1_8v;

			status = "disabled";

		};

	};

};