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Commit b1ed87c2 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "arm64: cpu_errata: Add ARM erratum 1188873 for Kryo 4G"

parents 3b95a25b b37a904a

arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ 
#define ARM_CPU_PART_CORTEX_A35		0xD04

#define ARM_CPU_PART_CORTEX_A55		0xD05

#define ARM_CPU_PART_CORTEX_A76		0xD0B

#define ARM_CPU_PART_KRYO4G		0x804

#define ARM_CPU_PART_KRYO5S		0x805



#define APM_CPU_PART_POTENZA		0x000
@@ -113,6 +114,7 @@ 
#define MIDR_CORTEX_A35 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A35)

#define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55)

#define MIDR_CORTEX_A76	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)

#define MIDR_KRYO4G	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO4G)

#define MIDR_KRYO5S	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO5S)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

arch/arm64/kernel/cpu_errata.c

+13 −2
Original line number Diff line number Diff line
@@ -533,6 +533,18 @@ static const struct midr_range arm64_harden_el2_vectors[] = { 


#endif



#ifdef CONFIG_ARM64_ERRATUM_1188873



static const struct midr_range arm64_workaround_1188873_cpus[] = {

	/* Cortex-A76 r0p0 to r2p0 */

	MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),

	/* Kryo-4G r15p14 */

	MIDR_RANGE(MIDR_KRYO4G, 15, 14, 15, 14),

	{},

};



#endif



const struct arm64_cpu_capabilities arm64_errata[] = {

#if	defined(CONFIG_ARM64_ERRATUM_826319) || \

	defined(CONFIG_ARM64_ERRATUM_827319) || \
@@ -704,10 +716,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
#endif

#ifdef CONFIG_ARM64_ERRATUM_1188873

	{

		/* Cortex-A76 r0p0 to r2p0 */

		.desc = "ARM erratum 1188873",

		.capability = ARM64_WORKAROUND_1188873,

		ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),

		ERRATA_MIDR_RANGE_LIST(arm64_workaround_1188873_cpus),

	},

#endif

	{