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Commit b37a904a authored by Neeraj Upadhyay's avatar Neeraj Upadhyay Committed by Gerrit - the friendly Code Review server
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arm64: cpu_errata: Add ARM erratum 1188873 for Kryo 4G 



ARM erratum 1188873 enables timer counter and frequency
register accesses from EL0 to be trapped to EL1. This
is required for Kryo 4G r15p14 cpus. So, enable the
errata.

Change-Id: I0f7832ca298ad67691057aedd91e65fb1ccb09b4
Signed-off-by: default avatarNeeraj Upadhyay <neeraju@codeaurora.org>
parent 004bc92b

arch/arm64/kernel/cpu_errata.c

+13 −2
Original line number Diff line number Diff line
@@ -533,6 +533,18 @@ static const struct midr_range arm64_harden_el2_vectors[] = { 


#endif



#ifdef CONFIG_ARM64_ERRATUM_1188873



static const struct midr_range arm64_workaround_1188873_cpus[] = {

	/* Cortex-A76 r0p0 to r2p0 */

	MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),

	/* Kryo-4G r15p14 */

	MIDR_RANGE(MIDR_KRYO4G, 15, 14, 15, 14),

	{},

};



#endif



const struct arm64_cpu_capabilities arm64_errata[] = {

#if	defined(CONFIG_ARM64_ERRATUM_826319) || \

	defined(CONFIG_ARM64_ERRATUM_827319) || \
@@ -704,10 +716,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
#endif

#ifdef CONFIG_ARM64_ERRATUM_1188873

	{

		/* Cortex-A76 r0p0 to r2p0 */

		.desc = "ARM erratum 1188873",

		.capability = ARM64_WORKAROUND_1188873,

		ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),

		ERRATA_MIDR_RANGE_LIST(arm64_workaround_1188873_cpus),

	},

#endif

	{