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Commit b009f1a2 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlx5-new-device-events' 

Saeed Mahameed says:

====================
Mellanox, mlx5 new device events

The following series is for mlx5-next tree [1], it adds the support of two
new device events, from Ilan Tayari:

1. High temperature warnings.
2. FPGA QP error event.

In case of no objection this series will be applied to mlx5-next tree
and will be sent later as a pull request to both rdma and net trees.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git/log/?h=mlx5-next



v1->v2:
  - improve commit message of the FPGA QP error event patch.
====================

Acked-by: default avatarDoug Ledford <dledford@redhat.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 35aada99 1f0cf89b

drivers/net/ethernet/mellanox/mlx5/core/eq.c

+27 −1
Original line number Diff line number Diff line
@@ -144,6 +144,8 @@ static const char *eqe_type_str(u8 type) 
		return "MLX5_EVENT_TYPE_GPIO_EVENT";

	case MLX5_EVENT_TYPE_PORT_MODULE_EVENT:

		return "MLX5_EVENT_TYPE_PORT_MODULE_EVENT";

	case MLX5_EVENT_TYPE_TEMP_WARN_EVENT:

		return "MLX5_EVENT_TYPE_TEMP_WARN_EVENT";

	case MLX5_EVENT_TYPE_REMOTE_CONFIG:

		return "MLX5_EVENT_TYPE_REMOTE_CONFIG";

	case MLX5_EVENT_TYPE_DB_BF_CONGESTION:
@@ -162,6 +164,8 @@ static const char *eqe_type_str(u8 type) 
		return "MLX5_EVENT_TYPE_NIC_VPORT_CHANGE";

	case MLX5_EVENT_TYPE_FPGA_ERROR:

		return "MLX5_EVENT_TYPE_FPGA_ERROR";

	case MLX5_EVENT_TYPE_FPGA_QP_ERROR:

		return "MLX5_EVENT_TYPE_FPGA_QP_ERROR";

	case MLX5_EVENT_TYPE_GENERAL_EVENT:

		return "MLX5_EVENT_TYPE_GENERAL_EVENT";

	default:
@@ -396,6 +400,20 @@ static void general_event_handler(struct mlx5_core_dev *dev, 
	}

}



static void mlx5_temp_warning_event(struct mlx5_core_dev *dev,

				    struct mlx5_eqe *eqe)

{

	u64 value_lsb;

	u64 value_msb;



	value_lsb = be64_to_cpu(eqe->data.temp_warning.sensor_warning_lsb);

	value_msb = be64_to_cpu(eqe->data.temp_warning.sensor_warning_msb);



	mlx5_core_warn(dev,

		       "High temperature on sensors with bit set %llx %llx",

		       value_msb, value_lsb);

}



/* caller must eventually call mlx5_cq_put on the returned cq */

static struct mlx5_core_cq *mlx5_eq_cq_get(struct mlx5_eq *eq, u32 cqn)

{
@@ -547,9 +565,14 @@ static irqreturn_t mlx5_eq_int(int irq, void *eq_ptr) 
			break;



		case MLX5_EVENT_TYPE_FPGA_ERROR:

		case MLX5_EVENT_TYPE_FPGA_QP_ERROR:

			mlx5_fpga_event(dev, eqe->type, &eqe->data.raw);

			break;



		case MLX5_EVENT_TYPE_TEMP_WARN_EVENT:

			mlx5_temp_warning_event(dev, eqe);

			break;



		case MLX5_EVENT_TYPE_GENERAL_EVENT:

			general_event_handler(dev, eqe);

			break;
@@ -822,10 +845,13 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev) 
		async_event_mask |= (1ull << MLX5_EVENT_TYPE_PPS_EVENT);



	if (MLX5_CAP_GEN(dev, fpga))

		async_event_mask |= (1ull << MLX5_EVENT_TYPE_FPGA_ERROR);

		async_event_mask |= (1ull << MLX5_EVENT_TYPE_FPGA_ERROR) |

				    (1ull << MLX5_EVENT_TYPE_FPGA_QP_ERROR);

	if (MLX5_CAP_GEN_MAX(dev, dct))

		async_event_mask |= (1ull << MLX5_EVENT_TYPE_DCT_DRAINED);



	if (MLX5_CAP_GEN(dev, temp_warn_event))

		async_event_mask |= (1ull << MLX5_EVENT_TYPE_TEMP_WARN_EVENT);



	err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD,

				 MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD,

include/linux/mlx5/device.h

+8 −0
Original line number Diff line number Diff line
@@ -314,6 +314,7 @@ enum mlx5_event { 
	MLX5_EVENT_TYPE_PORT_CHANGE	   = 0x09,

	MLX5_EVENT_TYPE_GPIO_EVENT	   = 0x15,

	MLX5_EVENT_TYPE_PORT_MODULE_EVENT  = 0x16,

	MLX5_EVENT_TYPE_TEMP_WARN_EVENT    = 0x17,

	MLX5_EVENT_TYPE_REMOTE_CONFIG	   = 0x19,

	MLX5_EVENT_TYPE_GENERAL_EVENT	   = 0x22,

	MLX5_EVENT_TYPE_PPS_EVENT          = 0x25,
@@ -330,6 +331,7 @@ enum mlx5_event { 
	MLX5_EVENT_TYPE_DCT_DRAINED        = 0x1c,



	MLX5_EVENT_TYPE_FPGA_ERROR         = 0x20,

	MLX5_EVENT_TYPE_FPGA_QP_ERROR      = 0x21,

};



enum {
@@ -626,6 +628,11 @@ struct mlx5_eqe_dct { 
	__be32  dctn;

};



struct mlx5_eqe_temp_warning {

	__be64 sensor_warning_msb;

	__be64 sensor_warning_lsb;

} __packed;



union ev_data {

	__be32				raw[7];

	struct mlx5_eqe_cmd		cmd;
@@ -642,6 +649,7 @@ union ev_data { 
	struct mlx5_eqe_port_module	port_module;

	struct mlx5_eqe_pps		pps;

	struct mlx5_eqe_dct             dct;

	struct mlx5_eqe_temp_warning	temp_warning;

} __packed;



struct mlx5_eqe {

include/linux/mlx5/mlx5_ifc.h

+2 −1
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ enum { 
	MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION        = 0xa,

	MLX5_EVENT_TYPE_CODING_PAGE_REQUEST                        = 0xb,

	MLX5_EVENT_TYPE_CODING_FPGA_ERROR                          = 0x20,

	MLX5_EVENT_TYPE_CODING_FPGA_QP_ERROR                       = 0x21

};



enum {
@@ -912,7 +913,7 @@ struct mlx5_ifc_cmd_hca_cap_bits { 
	u8         log_max_msg[0x5];

	u8         reserved_at_1c8[0x4];

	u8         max_tc[0x4];

	u8         reserved_at_1d0[0x1];

	u8         temp_warn_event[0x1];

	u8         dcbx[0x1];

	u8         general_notification_event[0x1];

	u8         reserved_at_1d3[0x2];

include/linux/mlx5/mlx5_ifc_fpga.h

+16 −0
Original line number Diff line number Diff line
@@ -470,6 +470,22 @@ struct mlx5_ifc_ipsec_counters_bits { 
	u8         dropped_cmd[0x40];

};



enum {

	MLX5_FPGA_QP_ERROR_EVENT_SYNDROME_RETRY_COUNTER_EXPIRED  = 0x1,

	MLX5_FPGA_QP_ERROR_EVENT_SYNDROME_RNR_EXPIRED            = 0x2,

};



struct mlx5_ifc_fpga_qp_error_event_bits {

	u8         reserved_at_0[0x40];



	u8         reserved_at_40[0x18];

	u8         syndrome[0x8];



	u8         reserved_at_60[0x60];



	u8         reserved_at_c0[0x8];

	u8         fpga_qpn[0x18];

};

enum mlx5_ifc_fpga_ipsec_response_syndrome {

	MLX5_FPGA_IPSEC_RESPONSE_SUCCESS = 0,

	MLX5_FPGA_IPSEC_RESPONSE_ILLEGAL_REQUEST = 1,