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Commit adcb6d9f authored by Keiji Hayashibara's avatar Keiji Hayashibara Committed by Greg Kroah-Hartman
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spi: uniphier: fix incorrect property items 



[ Upstream commit 3511ba7d4ca6f39e2d060bb94e42a41ad1fee7bf ]

This commit fixes incorrect property because it was different
from the actual.
The parameters of '#address-cells' and '#size-cells' were removed,
and 'interrupts', 'pinctrl-names' and 'pinctrl-0' were added.

Fixes: 4dcd5c27 ("spi: add DT bindings for UniPhier SPI controller")
Signed-off-by: default avatarKeiji Hayashibara <hayashibara.keiji@socionext.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 6c2075f7

Documentation/devicetree/bindings/spi/spi-uniphier.txt

+8 −6
Original line number Diff line number Diff line
@@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel. 
Required properties:

 - compatible: should be "socionext,uniphier-scssi"

 - reg: address and length of the spi master registers

 - #address-cells: must be <1>, see spi-bus.txt

 - #size-cells: must be <0>, see spi-bus.txt

 - clocks: A phandle to the clock for the device.

 - resets: A phandle to the reset control for the device.

 - interrupts: a single interrupt specifier

 - pinctrl-names: should be "default"

 - pinctrl-0: pin control state for the default mode

 - clocks: a phandle to the clock for the device

 - resets: a phandle to the reset control for the device



Example:



spi0: spi@54006000 {

	compatible = "socionext,uniphier-scssi";

	reg = <0x54006000 0x100>;

	#address-cells = <1>;

	#size-cells = <0>;

	interrupts = <0 39 4>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_spi0>;

	clocks = <&peri_clk 11>;

	resets = <&peri_rst 11>;

};