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Commit 9f12da43 authored by Finley Xiao's avatar Finley Xiao Committed by Heiko Stuebner
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ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x 



This patch adds a new opp table for cpu on rk322x SoC.

Signed-off-by: default avatarFinley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: default avatarFrank Wang <frank.wang@rock-chips.com>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 30ee5814

arch/arm/boot/dts/rk322x.dtsi

+32 −4
Original line number Original line Diff line number Diff line
@@ -66,10 +66,7 @@ 
			compatible = "arm,cortex-a7";

			compatible = "arm,cortex-a7";

			reg = <0xf00>;

			reg = <0xf00>;

			resets = <&cru SRST_CORE0>;

			resets = <&cru SRST_CORE0>;

			operating-points = <

			operating-points-v2 = <&cpu0_opp_table>;

				/* KHz    uV */

				 816000 1000000

			>;

			#cooling-cells = <2>; /* min followed by max */

			#cooling-cells = <2>; /* min followed by max */

			clock-latency = <40000>;

			clock-latency = <40000>;

			clocks = <&cru ARMCLK>;

			clocks = <&cru ARMCLK>;
@@ -80,6 +77,7 @@ 
			compatible = "arm,cortex-a7";

			compatible = "arm,cortex-a7";

			reg = <0xf01>;

			reg = <0xf01>;

			resets = <&cru SRST_CORE1>;

			resets = <&cru SRST_CORE1>;

			operating-points-v2 = <&cpu0_opp_table>;

		};

		};





		cpu2: cpu@f02 {

		cpu2: cpu@f02 {
@@ -87,6 +85,7 @@ 
			compatible = "arm,cortex-a7";

			compatible = "arm,cortex-a7";

			reg = <0xf02>;

			reg = <0xf02>;

			resets = <&cru SRST_CORE2>;

			resets = <&cru SRST_CORE2>;

			operating-points-v2 = <&cpu0_opp_table>;

		};

		};





		cpu3: cpu@f03 {

		cpu3: cpu@f03 {
@@ -94,6 +93,35 @@ 
			compatible = "arm,cortex-a7";

			compatible = "arm,cortex-a7";

			reg = <0xf03>;

			reg = <0xf03>;

			resets = <&cru SRST_CORE3>;

			resets = <&cru SRST_CORE3>;

			operating-points-v2 = <&cpu0_opp_table>;

		};

	};



	cpu0_opp_table: opp_table0 {

		compatible = "operating-points-v2";

		opp-shared;



		opp-408000000 {

			opp-hz = /bits/ 64 <408000000>;

			opp-microvolt = <950000>;

			clock-latency-ns = <40000>;

			opp-suspend;

		};

		opp-600000000 {

			opp-hz = /bits/ 64 <600000000>;

			opp-microvolt = <975000>;

		};

		opp-816000000 {

			opp-hz = /bits/ 64 <816000000>;

			opp-microvolt = <1000000>;

		};

		opp-1008000000 {

			opp-hz = /bits/ 64 <1008000000>;

			opp-microvolt = <1175000>;

		};

		opp-1200000000 {

			opp-hz = /bits/ 64 <1200000000>;

			opp-microvolt = <1275000>;

		};

		};

	};

	};