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Commit 9d852532 authored by Linux Build Service Account's avatar Linux Build Service Account
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Merge 1d193527 on remote branch

Change-Id: I20025d8622f4ac358f92b421491ecd761728e9a9
parents 612aafdc 1d193527
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+44 −19
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
 */

#include <linux/of_platform.h>
@@ -250,10 +250,13 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,

	if (enable) {
		if (priv->clk_cnt[clk_id] == 0) {
			ret = bolero_clk_rsc_mux0_clk_request(priv, default_clk_id,
			if (clk_id != VA_CORE_CLK) {
				ret = bolero_clk_rsc_mux0_clk_request(priv,
								default_clk_id,
								true);
				if (ret < 0)
					goto done;
			}

			ret = clk_prepare_enable(priv->clk[clk_id]);
			if (ret < 0) {
@@ -271,13 +274,23 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
					goto err_npl_clk;
				}
			}

			/*
			 * Temp SW workaround to address a glitch issue of
			 * VA GFMux instance responsible for switching from
			 * TX MCLK to VA MCLK. This configuration would be taken
			 * care in DSP itself
			 */
			if (clk_id != VA_CORE_CLK) {
				iowrite32(0x1, clk_muxsel);
				muxsel = ioread32(clk_muxsel);
				trace_printk("%s: muxsel value after enable: %d\n",
						__func__, muxsel);
			bolero_clk_rsc_mux0_clk_request(priv, default_clk_id,
				bolero_clk_rsc_mux0_clk_request(priv,
							default_clk_id,
							false);
			}
		}
		priv->clk_cnt[clk_id]++;
	} else {
		if (priv->clk_cnt[clk_id] <= 0) {
@@ -288,31 +301,43 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
		}
		priv->clk_cnt[clk_id]--;
		if (priv->clk_cnt[clk_id] == 0) {
			if (clk_id != VA_CORE_CLK) {
				ret = bolero_clk_rsc_mux0_clk_request(priv,
						default_clk_id, true);

			if (!ret)
				if (!ret) {
					/*
					 * Temp SW workaround to address a glitch issue
					 * of VA GFMux instance responsible for
					 * switching from TX MCLK to VA MCLK.
					 * This configuration would be taken
					 * care in DSP itself.
					 */
					iowrite32(0x0, clk_muxsel);

					muxsel = ioread32(clk_muxsel);
					trace_printk("%s: muxsel value after disable: %d\n",
							__func__, muxsel);
				}
			}
			if (priv->clk[clk_id + NPL_CLK_OFFSET])
				clk_disable_unprepare(
					priv->clk[clk_id + NPL_CLK_OFFSET]);
			clk_disable_unprepare(priv->clk[clk_id]);

			if (clk_id != VA_CORE_CLK) {
				if (!ret)
					bolero_clk_rsc_mux0_clk_request(priv,
						default_clk_id, false);
			}
		}
	}
	return ret;

err_npl_clk:
	clk_disable_unprepare(priv->clk[clk_id]);

err_clk:
	if (clk_id != VA_CORE_CLK)
		bolero_clk_rsc_mux0_clk_request(priv, default_clk_id, false);
done:
	return ret;
+5 −0
Original line number Diff line number Diff line
@@ -202,6 +202,11 @@ static int va_macro_clk_div_get(struct snd_soc_component *component)
	if (!va_macro_get_data(component, &va_dev, &va_priv, __func__))
		return -EINVAL;

	if ((va_priv->version == BOLERO_VERSION_2_1)
		&& !va_priv->lpi_enable
		&& (va_priv->dmic_clk_div == VA_MACRO_CLK_DIV_16))
		return VA_MACRO_CLK_DIV_8;

	return va_priv->dmic_clk_div;
}

+4 −2
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2015-2016, 2018-2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2015-2016, 2018-2020, The Linux Foundation. All rights reserved.
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
@@ -1027,6 +1028,7 @@ static int wsa881x_shutdown(struct wsa881x_pdata *pdata)
		return ret;
	}

	if (__clk_is_enabled(pdata->wsa_mclk))
		clk_disable_unprepare(pdata->wsa_mclk);

	ret = msm_cdc_pinctrl_select_sleep_state(pdata->wsa_clk_gpio_p);
+2 −2
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
 * Author: Brian Swetland <swetland@google.com>
 *
 * This software is licensed under the terms of the GNU General Public
@@ -2552,7 +2552,7 @@ void *q6asm_is_cpu_buf_avail(int dir, struct audio_client *ac, uint32_t *size,
			/* To make it more robust, we could loop and get the
			 * next avail buf, its risky though
			 */
			pr_err("%s: Next buf idx[0x%x] not available, dir[%d]\n",
			pr_debug("%s: Next buf idx[0x%x] not available, dir[%d]\n",
			 __func__, idx, dir);
			mutex_unlock(&port->lock);
			return NULL;
+17 −1
Original line number Diff line number Diff line
@@ -2988,7 +2988,23 @@ static int swrm_runtime_suspend(struct device *dev)
			mutex_unlock(&swrm->reslock);
			enable_bank_switch(swrm, 0, SWR_ROW_50, SWR_MIN_COL);
			mutex_lock(&swrm->reslock);
			if (!swrm->clk_stop_mode0_supp) {
				swrm_clk_pause(swrm);
			} else {
				/* Mask bus clash interrupt */
				swrm->intr_mask &= ~((u32)0x08);
				swr_master_write(swrm,
					SWRM_INTERRUPT_MASK_ADDR,
					swrm->intr_mask);
				swr_master_write(swrm,
					 SWR_MSTR_RX_SWRM_CPU_INTERRUPT_EN,
					 swrm->intr_mask);
				mutex_unlock(&swrm->reslock);
				/* clock stop sequence */
				swrm_cmd_fifo_wr_cmd(swrm, 0x2, 0xF, 0xF,
						SWRS_SCP_CONTROL);
				mutex_lock(&swrm->reslock);
			}
			swr_master_write(swrm, SWRM_COMP_CFG_ADDR, 0x00);
			list_for_each_entry(swr_dev, &mstr->devices, dev_list) {
				ret = swr_device_down(swr_dev);