Loading qcom/msm8917-camera.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -376,7 +376,7 @@ "camss_top_ahb_clk", "camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk", "camss_vfe_cpp_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,src-clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,min-clock-rate = <133000000>; resets = <&gcc GCC_CAMSS_MICRO_BCR>; reset-names = "micro_iface_reset"; Loading qcom/msm8937-camera.dtsi +5 −6 Original line number Diff line number Diff line Loading @@ -306,25 +306,22 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x400 0x00>, <&apps_iommu 0x2400 0x00>; qcom,iommu-dma-addr-pool = <0x10000000 0x70000000>; label = "vfe"; qcom,scratch-buf-support; }; msm_cam_smmu_cb2: msm_cam_smmu_cb2 { compatible = "qcom,msm-cam-smmu-cb"; label = "vfe_secure"; qcom,secure-context; }; msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "cpp"; }; msm_cam_smmu_cb4: msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1800 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "jpeg_enc0"; }; }; Loading Loading @@ -397,6 +394,8 @@ <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,micro-reset; qcom,src-clock-rates = <133333333 160000000 200000000 266666667 308570000 320000000 360000000>; qcom,cpp-fw-payload-info { qcom,stripe-base = <156>; qcom,plane-base = <141>; Loading qcom/qm215-camera.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -300,11 +300,11 @@ qcom,cam_smmu { status = "ok"; compatible = "qcom,msm-cam-smmu"; qcom,iommu-dma-addr-pool = <0x00020000 0x7FFE0000>; msm_cam_smmu_cb1: msm_cam_smmu_cb1 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x400 0x00>, <&apps_iommu 0x2400 0x00>; qcom,iommu-dma-addr-pool = <0x10000000 0x70000000>; label = "vfe"; qcom,scratch-buf-support; }; Loading @@ -312,12 +312,14 @@ msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "cpp"; }; msm_cam_smmu_cb4: msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1800 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "jpeg_enc0"; }; }; Loading Loading @@ -377,7 +379,7 @@ "camss_top_ahb_clk", "camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk", "camss_vfe_cpp_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,src-clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,min-clock-rate = <133000000>; resets = <&gcc GCC_CAMSS_MICRO_BCR>; reset-names = "micro_iface_reset"; Loading @@ -390,6 +392,8 @@ <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,micro-reset; qcom,src-clock-rates = <133333333 160000000 200000000 266666667 308570000 320000000 360000000>; qcom,cpp-fw-payload-info { qcom,stripe-base = <156>; qcom,plane-base = <141>; Loading qcom/sdm439-camera-sensor-mtp.dtsi +5 −3 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; actuator1: qcom,actuator@1 { Loading @@ -27,6 +28,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; eeprom0: qcom,eeprom@0 { Loading Loading @@ -60,7 +62,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_VANA"; status = "ok"; status = "disabled"; clocks = <&gcc MCLK0_CLK_SRC>, <&gcc GCC_CAMSS_MCLK0_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading @@ -140,7 +142,7 @@ "sensor_cam_mclk"; qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>; qcom,cam-power-seq-delay = <1 1 1 30 30 5>; status = "ok"; status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading @@ -177,7 +179,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2", "CAM_STANDBY2"; status = "ok"; status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading qcom/sdm439-camera-sensor-qrd.dtsi +4 −2 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; actuator1: qcom,actuator@1 { Loading @@ -27,6 +28,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; eeprom0: qcom,eeprom@0 { Loading Loading @@ -60,7 +62,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_VANA"; status = "ok"; status = "disabled"; clocks = <&gcc MCLK0_CLK_SRC>, <&gcc GCC_CAMSS_MCLK0_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading @@ -141,7 +143,7 @@ "sensor_cam_mclk"; qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>; qcom,cam-power-seq-delay = <1 1 1 30 30 5>; status = "ok"; status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading
qcom/msm8917-camera.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -376,7 +376,7 @@ "camss_top_ahb_clk", "camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk", "camss_vfe_cpp_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,src-clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,min-clock-rate = <133000000>; resets = <&gcc GCC_CAMSS_MICRO_BCR>; reset-names = "micro_iface_reset"; Loading
qcom/msm8937-camera.dtsi +5 −6 Original line number Diff line number Diff line Loading @@ -306,25 +306,22 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x400 0x00>, <&apps_iommu 0x2400 0x00>; qcom,iommu-dma-addr-pool = <0x10000000 0x70000000>; label = "vfe"; qcom,scratch-buf-support; }; msm_cam_smmu_cb2: msm_cam_smmu_cb2 { compatible = "qcom,msm-cam-smmu-cb"; label = "vfe_secure"; qcom,secure-context; }; msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "cpp"; }; msm_cam_smmu_cb4: msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1800 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "jpeg_enc0"; }; }; Loading Loading @@ -397,6 +394,8 @@ <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,micro-reset; qcom,src-clock-rates = <133333333 160000000 200000000 266666667 308570000 320000000 360000000>; qcom,cpp-fw-payload-info { qcom,stripe-base = <156>; qcom,plane-base = <141>; Loading
qcom/qm215-camera.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -300,11 +300,11 @@ qcom,cam_smmu { status = "ok"; compatible = "qcom,msm-cam-smmu"; qcom,iommu-dma-addr-pool = <0x00020000 0x7FFE0000>; msm_cam_smmu_cb1: msm_cam_smmu_cb1 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x400 0x00>, <&apps_iommu 0x2400 0x00>; qcom,iommu-dma-addr-pool = <0x10000000 0x70000000>; label = "vfe"; qcom,scratch-buf-support; }; Loading @@ -312,12 +312,14 @@ msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "cpp"; }; msm_cam_smmu_cb4: msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1800 0x00>; qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "jpeg_enc0"; }; }; Loading Loading @@ -377,7 +379,7 @@ "camss_top_ahb_clk", "camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk", "camss_vfe_cpp_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,src-clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,clock-rates = <61540000 180000000 0 0 0 180000000 0 0>; qcom,min-clock-rate = <133000000>; resets = <&gcc GCC_CAMSS_MICRO_BCR>; reset-names = "micro_iface_reset"; Loading @@ -390,6 +392,8 @@ <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,micro-reset; qcom,src-clock-rates = <133333333 160000000 200000000 266666667 308570000 320000000 360000000>; qcom,cpp-fw-payload-info { qcom,stripe-base = <156>; qcom,plane-base = <141>; Loading
qcom/sdm439-camera-sensor-mtp.dtsi +5 −3 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; actuator1: qcom,actuator@1 { Loading @@ -27,6 +28,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; eeprom0: qcom,eeprom@0 { Loading Loading @@ -60,7 +62,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_VANA"; status = "ok"; status = "disabled"; clocks = <&gcc MCLK0_CLK_SRC>, <&gcc GCC_CAMSS_MCLK0_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading @@ -140,7 +142,7 @@ "sensor_cam_mclk"; qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>; qcom,cam-power-seq-delay = <1 1 1 30 30 5>; status = "ok"; status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading @@ -177,7 +179,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2", "CAM_STANDBY2"; status = "ok"; status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading
qcom/sdm439-camera-sensor-qrd.dtsi +4 −2 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; actuator1: qcom,actuator@1 { Loading @@ -27,6 +28,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; status = "disabled"; }; eeprom0: qcom,eeprom@0 { Loading Loading @@ -60,7 +62,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_VANA"; status = "ok"; status = "disabled"; clocks = <&gcc MCLK0_CLK_SRC>, <&gcc GCC_CAMSS_MCLK0_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading Loading @@ -141,7 +143,7 @@ "sensor_cam_mclk"; qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>; qcom,cam-power-seq-delay = <1 1 1 30 30 5>; status = "ok"; status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; Loading