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Commit 9abd5f05 authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Mike Turquette
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clk: add si5351 i2c common clock driver



This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver does not
support VXCO feature of si5351b. Passing platform_data or DT bindings
selectively allows to overwrite stored Si5351 configuration which is
very helpful for clock generators with empty eeprom configuration.
Corresponding device tree binding documentation is also added.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: default avatarDaniel Mack <zonque@gmail.com>
Acked-by: default avatarGuenter Roeck <linux@roeck-us.net>
Tested-by: default avatarMichal Bachraty <michal.bachraty@streamunlimited.com>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 79b16641
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Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.

Reference
[1] Si5351A/B/C Data Sheet
    http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351.pdf

The Si5351a/b/c are programmable i2c clock generators with upto 8 output
clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
3 output clocks are accessible. The internal structure of the clock
generators can be found in [1].

==I2C device node==

Required properties:
- compatible: shall be one of "silabs,si5351{a,a-msop,b,c}".
- reg: i2c device address, shall be 0x60 or 0x61.
- #clock-cells: from common clock binding; shall be set to 1.
- clocks: from common clock binding; list of parent clock
  handles, shall be xtal reference clock or xtal and clkin for
  si5351c only.
- #address-cells: shall be set to 1.
- #size-cells: shall be set to 0.

Optional properties:
- silabs,pll-source: pair of (number, source) for each pll. Allows
  to overwrite clock source of pll A (number=0) or B (number=1).

==Child nodes==

Each of the clock outputs can be overwritten individually by
using a child node to the I2C device node. If a child node for a clock
output is not set, the eeprom configuration is not overwritten.

Required child node properties:
- reg: number of clock output.

Optional child node properties:
- silabs,clock-source: source clock of the output divider stage N, shall be
  0 = multisynth N
  1 = multisynth 0 for output clocks 0-3, else multisynth4
  2 = xtal
  3 = clkin (si5351c only)
- silabs,drive-strength: output drive strength in mA, shall be one of {2,4,6,8}.
- silabs,multisynth-source: source pll A(0) or B(1) of corresponding multisynth
  divider.
- silabs,pll-master: boolean, multisynth can change pll frequency.

==Example==

/* 25MHz reference crystal */
ref25: ref25M {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <25000000>;
};

i2c-master-node {

	/* Si5351a msop10 i2c clock generator */
	si5351a: clock-generator@60 {
		compatible = "silabs,si5351a-msop";
		reg = <0x60>;
		#address-cells = <1>;
		#size-cells = <0>;
		#clock-cells = <1>;

		/* connect xtal input to 25MHz reference */
		clocks = <&ref25>;

		/* connect xtal input as source of pll0 and pll1 */
		silabs,pll-source = <0 0>, <1 0>;

		/*
		 * overwrite clkout0 configuration with:
		 * - 8mA output drive strength
		 * - pll0 as clock source of multisynth0
		 * - multisynth0 as clock source of output divider
		 * - multisynth0 can change pll0
		 * - set initial clock frequency of 74.25MHz
		 */
		clkout0 {
			reg = <0>;
			silabs,drive-strength = <8>;
			silabs,multisynth-source = <0>;
			silabs,clock-source = <0>;
			silabs,pll-master;
			clock-frequency = <74250000>;
		};

		/*
		 * overwrite clkout1 configuration with:
		 * - 4mA output drive strength
		 * - pll1 as clock source of multisynth1
		 * - multisynth1 as clock source of output divider
		 * - multisynth1 can change pll1
		 */
		clkout1 {
			reg = <1>;
			silabs,drive-strength = <4>;
			silabs,multisynth-source = <1>;
			silabs,clock-source = <0>;
			pll-master;
		};

		/*
		 * overwrite clkout2 configuration with:
		 * - xtal as clock source of output divider
		 */
		clkout2 {
			reg = <2>;
			silabs,clock-source = <2>;
		};
	};
};
+1 −0
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@@ -48,6 +48,7 @@ samsung Samsung Semiconductor
sbs	Smart Battery System
schindler	Schindler
sil	Silicon Image
silabs	Silicon Laboratories
simtek
sirf	SiRF Technology, Inc.
snps 	Synopsys, Inc.
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@@ -55,6 +55,15 @@ config COMMON_CLK_MAX77686
	---help---
	  This driver supports Maxim 77686 crystal oscillator clock. 

config COMMON_CLK_SI5351
	tristate "Clock driver for SiLabs 5351A/B/C"
	depends on I2C
	select REGMAP_I2C
	select RATIONAL
	---help---
	  This driver supports Silicon Labs 5351A/B/C programmable clock
	  generators.

config CLK_TWL6040
	tristate "External McPDM functional clock from twl6040"
	depends on TWL6040_CORE
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@@ -36,4 +36,5 @@ obj-$(CONFIG_X86) += x86/
obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
obj-$(CONFIG_CLK_TWL6040)	+= clk-twl6040.o
+1510 −0

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