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Commit 79b16641 authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Mike Turquette
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clk: add device tree fixed-factor-clock binding support



Add support for DT "fixed-factor-clock" binding to the common fixed
factor clock support.

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: default avatarChristian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent fb72a059
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+24 −0
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Binding for simple fixed factor rate clock sources.

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:
- compatible : shall be "fixed-factor-clock".
- #clock-cells : from common clock binding; shall be set to 0.
- clock-div: fixed divider.
- clock-mult: fixed multiplier.
- clocks: parent clock.

Optional properties:
- clock-output-names : From common clock binding.

Example:
	clock {
		compatible = "fixed-factor-clock";
		clocks = <&parentclk>;
		#clock-cells = <0>;
		div = <2>;
		mult = <1>;
	};
+36 −0
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@@ -11,6 +11,7 @@
#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/of.h>

/*
 * DOC: basic fixed multiplier and divider clock that cannot gate
@@ -96,3 +97,38 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,

	return clk;
}
#ifdef CONFIG_OF
/**
 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
 */
void __init of_fixed_factor_clk_setup(struct device_node *node)
{
	struct clk *clk;
	const char *clk_name = node->name;
	const char *parent_name;
	u32 div, mult;

	if (of_property_read_u32(node, "clock-div", &div)) {
		pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
			__func__, node->name);
		return;
	}

	if (of_property_read_u32(node, "clock-mult", &mult)) {
		pr_err("%s Fixed factor clock <%s> must have a clokc-mult property\n",
			__func__, node->name);
		return;
	}

	of_property_read_string(node, "clock-output-names", &clk_name);
	parent_name = of_clk_get_parent_name(node, 0);

	clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
					mult, div);
	if (!IS_ERR(clk))
		of_clk_add_provider(node, of_clk_src_simple_get, clk);
}
EXPORT_SYMBOL_GPL(of_fixed_factor_clk_setup);
CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
		of_fixed_factor_clk_setup);
#endif
+2 −0
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@@ -325,6 +325,8 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
		void __iomem *reg, u8 shift, u32 mask,
		u8 clk_mux_flags, u32 *table, spinlock_t *lock);

void of_fixed_factor_clk_setup(struct device_node *node);

/**
 * struct clk_fixed_factor - fixed multiplier and divider clock
 *