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Commit 97c322e7 authored by Sagar Arun Kamble's avatar Sagar Arun Kamble Committed by Daniel Vetter
Browse files

drm/i915: Program GuC MAX IDLE Count 



Cc: Alex Dai <yu.dai@intel.com>
Cc: Tom O'Rourke <Tom.O'Rourke@intel.com>
Cc: Akash Goel <akash.goel@intel.com>
Signed-off-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: default avatarAlex Dai <yu.dai@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 63a4dec2

drivers/gpu/drm/i915/i915_guc_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ 
#define   START_DMA			  (1<<0)

#define DMA_GUC_WOPCM_OFFSET		0xc340

#define   GUC_WOPCM_OFFSET_VALUE	  0x80000	/* 512KB */

#define GUC_MAX_IDLE_COUNT		0xC3E4



#define GUC_WOPCM_SIZE			0xc050

#define   GUC_WOPCM_SIZE_VALUE  	  (0x80 << 12)	/* 512KB */

drivers/gpu/drm/i915/intel_pm.c

+4 −0
Original line number Diff line number Diff line
@@ -4865,6 +4865,10 @@ static void gen9_enable_rc6(struct drm_device *dev) 
	I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */

	for_each_ring(ring, dev_priv, unused)

		I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);



	if (HAS_GUC_UCODE(dev))

		I915_WRITE(GUC_MAX_IDLE_COUNT, 0xA);



	I915_WRITE(GEN6_RC_SLEEP, 0);

	I915_WRITE(GEN6_RC6_THRESHOLD, 37500); /* 37.5/125ms per EI */