Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 956ae91a authored by Marc Zyngier's avatar Marc Zyngier Committed by Thomas Gleixner
Browse files

irqchip/gic-v3: Report that effective affinity is a single target 



The GICv3 driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: http://lkml.kernel.org/r/20170818083925.10108-5-marc.zyngier@arm.com
parent 0c9e4982

drivers/irqchip/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ config ARM_GIC_V3 
	select MULTI_IRQ_HANDLER

	select IRQ_DOMAIN_HIERARCHY

	select PARTITION_PERCPU

	select GENERIC_IRQ_EFFECTIVE_AFF_MASK



config ARM_GIC_V3_ITS

	bool

drivers/irqchip/irq-gic-v3.c

+3 −0
Original line number Diff line number Diff line
@@ -670,6 +670,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 
	else

		gic_dist_wait_for_rwp();



	irq_data_update_effective_affinity(d, cpumask_of(cpu));



	return IRQ_SET_MASK_OK_DONE;

}

#else
@@ -768,6 +770,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
		irq_domain_set_info(d, irq, hw, chip, d->host_data,

				    handle_fasteoi_irq, NULL, NULL);

		irq_set_probe(irq);

		irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));

	}

	/* LPIs */

	if (hw >= 8192 && hw < GIC_ID_NR) {