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Commit 0c9e4982 authored by Marc Zyngier's avatar Marc Zyngier Committed by Thomas Gleixner
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irqchip/gic: Report that effective affinity is a single target 



The GIC driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: http://lkml.kernel.org/r/20170818083925.10108-4-marc.zyngier@arm.com
parent 6bc6d4ab

drivers/irqchip/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ config ARM_GIC 
	select IRQ_DOMAIN

	select IRQ_DOMAIN_HIERARCHY

	select MULTI_IRQ_HANDLER

	select GENERIC_IRQ_EFFECTIVE_AFF_MASK



config ARM_GIC_PM

	bool

drivers/irqchip/irq-gic.c

+3 −0
Original line number Diff line number Diff line
@@ -344,6 +344,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 
	writel_relaxed(val | bit, reg);

	gic_unlock_irqrestore(flags);



	irq_data_update_effective_affinity(d, cpumask_of(cpu));



	return IRQ_SET_MASK_OK_DONE;

}

#endif
@@ -966,6 +968,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
		irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,

				    handle_fasteoi_irq, NULL, NULL);

		irq_set_probe(irq);

		irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));

	}

	return 0;

}