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Commit 8efff337 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: add golden register settings for hawaii 



The golden register settings are optimal settings for
certain registers from the hardware team.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 21e438af

drivers/gpu/drm/radeon/cik.c

+179 −0
Original line number Diff line number Diff line
@@ -1297,6 +1297,171 @@ static const u32 kalindi_mgcg_cgcg_init[] = 
	0xd80c, 0xff000ff0, 0x00000100

};



static const u32 hawaii_golden_spm_registers[] =

{

	0x30800, 0xe0ffffff, 0xe0000000

};



static const u32 hawaii_golden_common_registers[] =

{

	0x30800, 0xffffffff, 0xe0000000,

	0x28350, 0xffffffff, 0x3a00161a,

	0x28354, 0xffffffff, 0x0000002e,

	0x9a10, 0xffffffff, 0x00018208,

	0x98f8, 0xffffffff, 0x12011003

};



static const u32 hawaii_golden_registers[] =

{

	0x3354, 0x00000333, 0x00000333,

	0x9a10, 0x00010000, 0x00058208,

	0x9830, 0xffffffff, 0x00000000,

	0x9834, 0xf00fffff, 0x00000400,

	0x9838, 0x0002021c, 0x00020200,

	0xc78, 0x00000080, 0x00000000,

	0x5bb0, 0x000000f0, 0x00000070,

	0x5bc0, 0xf0311fff, 0x80300000,

	0x350c, 0x00810000, 0x408af000,

	0x7030, 0x31000111, 0x00000011,

	0x2f48, 0x73773777, 0x12010001,

	0x2120, 0x0000007f, 0x0000001b,

	0x21dc, 0x00007fb6, 0x00002191,

	0x3628, 0x0000003f, 0x0000000a,

	0x362c, 0x0000003f, 0x0000000a,

	0x2ae4, 0x00073ffe, 0x000022a2,

	0x240c, 0x000007ff, 0x00000000,

	0x8bf0, 0x00002001, 0x00000001,

	0x8b24, 0xffffffff, 0x00ffffff,

	0x30a04, 0x0000ff0f, 0x00000000,

	0x28a4c, 0x07ffffff, 0x06000000,

	0x3e78, 0x00000001, 0x00000002,

	0xc768, 0x00000008, 0x00000008,

	0xc770, 0x00000f00, 0x00000800,

	0xc774, 0x00000f00, 0x00000800,

	0xc798, 0x00ffffff, 0x00ff7fbf,

	0xc79c, 0x00ffffff, 0x00ff7faf,

	0x8c00, 0x000000ff, 0x00000800,

	0xe40, 0x00001fff, 0x00001fff,

	0x9060, 0x0000007f, 0x00000020,

	0x9508, 0x00010000, 0x00010000,

	0xae00, 0x00100000, 0x000ff07c,

	0xac14, 0x000003ff, 0x0000000f,

	0xac10, 0xffffffff, 0x7564fdec,

	0xac0c, 0xffffffff, 0x3120b9a8,

	0xac08, 0x20000000, 0x0f9c0000

};



static const u32 hawaii_mgcg_cgcg_init[] =

{

	0xc420, 0xffffffff, 0xfffffffd,

	0x30800, 0xffffffff, 0xe0000000,

	0x3c2a0, 0xffffffff, 0x00000100,

	0x3c208, 0xffffffff, 0x00000100,

	0x3c2c0, 0xffffffff, 0x00000100,

	0x3c2c8, 0xffffffff, 0x00000100,

	0x3c2c4, 0xffffffff, 0x00000100,

	0x55e4, 0xffffffff, 0x00200100,

	0x3c280, 0xffffffff, 0x00000100,

	0x3c214, 0xffffffff, 0x06000100,

	0x3c220, 0xffffffff, 0x00000100,

	0x3c218, 0xffffffff, 0x06000100,

	0x3c204, 0xffffffff, 0x00000100,

	0x3c2e0, 0xffffffff, 0x00000100,

	0x3c224, 0xffffffff, 0x00000100,

	0x3c200, 0xffffffff, 0x00000100,

	0x3c230, 0xffffffff, 0x00000100,

	0x3c234, 0xffffffff, 0x00000100,

	0x3c250, 0xffffffff, 0x00000100,

	0x3c254, 0xffffffff, 0x00000100,

	0x3c258, 0xffffffff, 0x00000100,

	0x3c25c, 0xffffffff, 0x00000100,

	0x3c260, 0xffffffff, 0x00000100,

	0x3c27c, 0xffffffff, 0x00000100,

	0x3c278, 0xffffffff, 0x00000100,

	0x3c210, 0xffffffff, 0x06000100,

	0x3c290, 0xffffffff, 0x00000100,

	0x3c274, 0xffffffff, 0x00000100,

	0x3c2b4, 0xffffffff, 0x00000100,

	0x3c2b0, 0xffffffff, 0x00000100,

	0x3c270, 0xffffffff, 0x00000100,

	0x30800, 0xffffffff, 0xe0000000,

	0x3c020, 0xffffffff, 0x00010000,

	0x3c024, 0xffffffff, 0x00030002,

	0x3c028, 0xffffffff, 0x00040007,

	0x3c02c, 0xffffffff, 0x00060005,

	0x3c030, 0xffffffff, 0x00090008,

	0x3c034, 0xffffffff, 0x00010000,

	0x3c038, 0xffffffff, 0x00030002,

	0x3c03c, 0xffffffff, 0x00040007,

	0x3c040, 0xffffffff, 0x00060005,

	0x3c044, 0xffffffff, 0x00090008,

	0x3c048, 0xffffffff, 0x00010000,

	0x3c04c, 0xffffffff, 0x00030002,

	0x3c050, 0xffffffff, 0x00040007,

	0x3c054, 0xffffffff, 0x00060005,

	0x3c058, 0xffffffff, 0x00090008,

	0x3c05c, 0xffffffff, 0x00010000,

	0x3c060, 0xffffffff, 0x00030002,

	0x3c064, 0xffffffff, 0x00040007,

	0x3c068, 0xffffffff, 0x00060005,

	0x3c06c, 0xffffffff, 0x00090008,

	0x3c070, 0xffffffff, 0x00010000,

	0x3c074, 0xffffffff, 0x00030002,

	0x3c078, 0xffffffff, 0x00040007,

	0x3c07c, 0xffffffff, 0x00060005,

	0x3c080, 0xffffffff, 0x00090008,

	0x3c084, 0xffffffff, 0x00010000,

	0x3c088, 0xffffffff, 0x00030002,

	0x3c08c, 0xffffffff, 0x00040007,

	0x3c090, 0xffffffff, 0x00060005,

	0x3c094, 0xffffffff, 0x00090008,

	0x3c098, 0xffffffff, 0x00010000,

	0x3c09c, 0xffffffff, 0x00030002,

	0x3c0a0, 0xffffffff, 0x00040007,

	0x3c0a4, 0xffffffff, 0x00060005,

	0x3c0a8, 0xffffffff, 0x00090008,

	0x3c0ac, 0xffffffff, 0x00010000,

	0x3c0b0, 0xffffffff, 0x00030002,

	0x3c0b4, 0xffffffff, 0x00040007,

	0x3c0b8, 0xffffffff, 0x00060005,

	0x3c0bc, 0xffffffff, 0x00090008,

	0x3c0c0, 0xffffffff, 0x00010000,

	0x3c0c4, 0xffffffff, 0x00030002,

	0x3c0c8, 0xffffffff, 0x00040007,

	0x3c0cc, 0xffffffff, 0x00060005,

	0x3c0d0, 0xffffffff, 0x00090008,

	0x3c0d4, 0xffffffff, 0x00010000,

	0x3c0d8, 0xffffffff, 0x00030002,

	0x3c0dc, 0xffffffff, 0x00040007,

	0x3c0e0, 0xffffffff, 0x00060005,

	0x3c0e4, 0xffffffff, 0x00090008,

	0x3c0e8, 0xffffffff, 0x00010000,

	0x3c0ec, 0xffffffff, 0x00030002,

	0x3c0f0, 0xffffffff, 0x00040007,

	0x3c0f4, 0xffffffff, 0x00060005,

	0x3c0f8, 0xffffffff, 0x00090008,

	0xc318, 0xffffffff, 0x00020200,

	0x3350, 0xffffffff, 0x00000200,

	0x15c0, 0xffffffff, 0x00000400,

	0x55e8, 0xffffffff, 0x00000000,

	0x2f50, 0xffffffff, 0x00000902,

	0x3c000, 0xffffffff, 0x96940200,

	0x8708, 0xffffffff, 0x00900100,

	0xc424, 0xffffffff, 0x0020003f,

	0x38, 0xffffffff, 0x0140001c,

	0x3c, 0x000f0000, 0x000f0000,

	0x220, 0xffffffff, 0xc060000c,

	0x224, 0xc0000fff, 0x00000100,

	0xf90, 0xffffffff, 0x00000100,

	0xf98, 0x00000101, 0x00000000,

	0x20a8, 0xffffffff, 0x00000104,

	0x55e4, 0xff000fff, 0x00000100,

	0x30cc, 0xc0000fff, 0x00000104,

	0xc1e4, 0x00000001, 0x00000001,

	0xd00c, 0xff000ff0, 0x00000100,

	0xd80c, 0xff000ff0, 0x00000100

};



static void cik_init_golden_registers(struct radeon_device *rdev)

{

	switch (rdev->family) {
@@ -1342,6 +1507,20 @@ static void cik_init_golden_registers(struct radeon_device *rdev) 
						 spectre_golden_spm_registers,

						 (const u32)ARRAY_SIZE(spectre_golden_spm_registers));

		break;

	case CHIP_HAWAII:

		radeon_program_register_sequence(rdev,

						 hawaii_mgcg_cgcg_init,

						 (const u32)ARRAY_SIZE(hawaii_mgcg_cgcg_init));

		radeon_program_register_sequence(rdev,

						 hawaii_golden_registers,

						 (const u32)ARRAY_SIZE(hawaii_golden_registers));

		radeon_program_register_sequence(rdev,

						 hawaii_golden_common_registers,

						 (const u32)ARRAY_SIZE(hawaii_golden_common_registers));

		radeon_program_register_sequence(rdev,

						 hawaii_golden_spm_registers,

						 (const u32)ARRAY_SIZE(hawaii_golden_spm_registers));

		break;

	default:

		break;

	}