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Commit 8d1666fd authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlx4-misc-for-4.16' 



Tariq Toukan says:

====================
mlx4 misc for 4.16

This patchset contains misc cleanups and improvements
to the mlx4 Core and Eth drivers.

In patches 1 and 2 I reduce and reorder the branches in the RX csum flow.
In patch 3 I align the FMR unmapping flow with the device spec, to allow
  a remapping afterwards.
Patch 4 by Moni changes the default QoS settings so that a pause
  frame stops all traffic regardless of its prio.

Series generated against net-next commit:
836df24a net: hns3: hns3_get_channels() can be static
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 8ec69574 a42b63c1

drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c

+5 −0
Original line number Diff line number Diff line
@@ -310,6 +310,7 @@ static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, struct ieee_ets *ets) 
		}



		switch (ets->tc_tsa[i]) {

		case IEEE_8021QAZ_TSA_VENDOR:

		case IEEE_8021QAZ_TSA_STRICT:

			break;

		case IEEE_8021QAZ_TSA_ETS:
@@ -347,6 +348,10 @@ static int mlx4_en_config_port_scheduler(struct mlx4_en_priv *priv, 
	/* higher TC means higher priority => lower pg */

	for (i = IEEE_8021QAZ_MAX_TCS - 1; i >= 0; i--) {

		switch (ets->tc_tsa[i]) {

		case IEEE_8021QAZ_TSA_VENDOR:

			pg[i] = MLX4_EN_TC_VENDOR;

			tc_tx_bw[i] = MLX4_EN_BW_MAX;

			break;

		case IEEE_8021QAZ_TSA_STRICT:

			pg[i] = num_strict++;

			tc_tx_bw[i] = MLX4_EN_BW_MAX;

drivers/net/ethernet/mellanox/mlx4/en_netdev.c

+7 −0
Original line number Diff line number Diff line
@@ -3336,6 +3336,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 
	priv->msg_enable = MLX4_EN_MSG_LEVEL;

#ifdef CONFIG_MLX4_EN_DCB

	if (!mlx4_is_slave(priv->mdev->dev)) {

		u8 prio;



		for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {

			priv->ets.prio_tc[prio] = prio;

			priv->ets.tc_tsa[prio]  = IEEE_8021QAZ_TSA_VENDOR;

		}



		priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |

			DCB_CAP_DCBX_VER_IEEE;

		priv->flags |= MLX4_EN_DCB_ENABLED;

drivers/net/ethernet/mellanox/mlx4/en_rx.c

+29 −27
Original line number Diff line number Diff line
@@ -617,6 +617,10 @@ static int get_fixed_ipv6_csum(__wsum hw_checksum, struct sk_buff *skb, 
	return 0;

}

#endif



/* We reach this function only after checking that any of

 * the (IPv4 | IPv6) bits are set in cqe->status.

 */

static int check_csum(struct mlx4_cqe *cqe, struct sk_buff *skb, void *va,

		      netdev_features_t dev_features)

{
@@ -632,13 +636,11 @@ static int check_csum(struct mlx4_cqe *cqe, struct sk_buff *skb, void *va, 
		hdr += sizeof(struct vlan_hdr);

	}



	if (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4))

		return get_fixed_ipv4_csum(hw_checksum, skb, hdr);

#if IS_ENABLED(CONFIG_IPV6)

	if (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV6))

		return get_fixed_ipv6_csum(hw_checksum, skb, hdr);

#endif

	return 0;

	return get_fixed_ipv4_csum(hw_checksum, skb, hdr);

}



int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
@@ -814,35 +816,35 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud 
		if (likely(dev->features & NETIF_F_RXCSUM)) {

			if (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_TCP |

						      MLX4_CQE_STATUS_UDP)) {

				if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&

				    cqe->checksum == cpu_to_be16(0xffff)) {

					bool l2_tunnel = (dev->hw_enc_features & NETIF_F_RXCSUM) &&

						(cqe->vlan_my_qpn & cpu_to_be32(MLX4_CQE_L2_TUNNEL));

				bool l2_tunnel;



				if (!((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&

				      cqe->checksum == cpu_to_be16(0xffff)))

					goto csum_none;



				l2_tunnel = (dev->hw_enc_features & NETIF_F_RXCSUM) &&

					(cqe->vlan_my_qpn & cpu_to_be32(MLX4_CQE_L2_TUNNEL));

				ip_summed = CHECKSUM_UNNECESSARY;

				hash_type = PKT_HASH_TYPE_L4;

				if (l2_tunnel)

					skb->csum_level = 1;

				ring->csum_ok++;

			} else {

					goto csum_none;

				}

			} else {

				if (priv->flags & MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP &&

				if (!(priv->flags & MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP &&

				      (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4 |

							       MLX4_CQE_STATUS_IPV6))) {

					if (check_csum(cqe, skb, va, dev->features)) {

#if IS_ENABLED(CONFIG_IPV6)

								 MLX4_CQE_STATUS_IPV6))))

#else

								 0))))

#endif

					goto csum_none;

				if (check_csum(cqe, skb, va, dev->features))

					goto csum_none;

					} else {

				ip_summed = CHECKSUM_COMPLETE;

				hash_type = PKT_HASH_TYPE_L3;

				ring->csum_complete++;

			}

		} else {

					goto csum_none;

				}

			}

		} else {

csum_none:

			ip_summed = CHECKSUM_NONE;

			hash_type = PKT_HASH_TYPE_L3;

drivers/net/ethernet/mellanox/mlx4/mlx4_en.h

+1 −0
Original line number Diff line number Diff line
@@ -479,6 +479,7 @@ struct mlx4_en_frag_info { 
#define MLX4_EN_BW_MIN 1

#define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */



#define MLX4_EN_TC_VENDOR 0

#define MLX4_EN_TC_ETS 7



enum dcb_pfc_type {

drivers/net/ethernet/mellanox/mlx4/mr.c

+21 −19
Original line number Diff line number Diff line
@@ -1103,30 +1103,16 @@ EXPORT_SYMBOL_GPL(mlx4_fmr_enable); 
void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr,

		    u32 *lkey, u32 *rkey)

{

	struct mlx4_cmd_mailbox *mailbox;

	int err;



	if (!fmr->maps)

		return;



	fmr->maps = 0;

	/* To unmap: it is sufficient to take back ownership from HW */

	*(u8 *)fmr->mpt = MLX4_MPT_STATUS_SW;



	mailbox = mlx4_alloc_cmd_mailbox(dev);

	if (IS_ERR(mailbox)) {

		err = PTR_ERR(mailbox);

		pr_warn("mlx4_ib: mlx4_alloc_cmd_mailbox failed (%d)\n", err);

		return;

	}

	/* Make sure MPT status is visible */

	wmb();



	err = mlx4_HW2SW_MPT(dev, NULL,

			     key_to_hw_index(fmr->mr.key) &

			     (dev->caps.num_mpts - 1));

	mlx4_free_cmd_mailbox(dev, mailbox);

	if (err) {

		pr_warn("mlx4_ib: mlx4_HW2SW_MPT failed (%d)\n", err);

		return;

	}

	fmr->mr.enabled = MLX4_MPT_EN_SW;

	fmr->maps = 0;

}

EXPORT_SYMBOL_GPL(mlx4_fmr_unmap);
@@ -1136,6 +1122,22 @@ int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr) 


	if (fmr->maps)

		return -EBUSY;

	if (fmr->mr.enabled == MLX4_MPT_EN_HW) {

		/* In case of FMR was enabled and unmapped

		 * make sure to give ownership of MPT back to HW

		 * so HW2SW_MPT command will success.

		 */

		*(u8 *)fmr->mpt = MLX4_MPT_STATUS_SW;

		/* Make sure MPT status is visible before changing MPT fields */

		wmb();

		fmr->mpt->length = 0;

		fmr->mpt->start  = 0;

		/* Make sure MPT data is visible after changing MPT status */

		wmb();

		*(u8 *)fmr->mpt = MLX4_MPT_STATUS_HW;

		/* make sure MPT status is visible */

		wmb();

	}



	ret = mlx4_mr_free(dev, &fmr->mr);

	if (ret)