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Commit a42b63c1 authored by Moni Shoua's avatar Moni Shoua Committed by David S. Miller
Browse files

net/mlx4_en: Change default QoS settings 



Change the default mapping between TC and TCG as follows:

Prio     |             TC/TCG
         |      from             to
         |    (set by FW)      (set by SW)
---------+-----------------------------------
0        |      0/0              0/7
1        |      1/0              0/6
2        |      2/0              0/5
3        |      3/0              0/4
4        |      4/0              0/3
5        |      5/0              0/2
6        |      6/0              0/1
7        |      7/0              0/0

These new settings cause that a pause frame for any prio stops
traffic for all prios.

Fixes: 564c274c ("net/mlx4_en: DCB QoS support")
Signed-off-by: default avatarMoni Shoua <monis@mellanox.com>
Signed-off-by: default avatarMaor Gottlieb <maorg@mellanox.com>
Signed-off-by: default avatarTariq Toukan <tariqt@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent fd4a3e28

drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c

+5 −0
Original line number Diff line number Diff line
@@ -310,6 +310,7 @@ static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, struct ieee_ets *ets) 
		}



		switch (ets->tc_tsa[i]) {

		case IEEE_8021QAZ_TSA_VENDOR:

		case IEEE_8021QAZ_TSA_STRICT:

			break;

		case IEEE_8021QAZ_TSA_ETS:
@@ -347,6 +348,10 @@ static int mlx4_en_config_port_scheduler(struct mlx4_en_priv *priv, 
	/* higher TC means higher priority => lower pg */

	for (i = IEEE_8021QAZ_MAX_TCS - 1; i >= 0; i--) {

		switch (ets->tc_tsa[i]) {

		case IEEE_8021QAZ_TSA_VENDOR:

			pg[i] = MLX4_EN_TC_VENDOR;

			tc_tx_bw[i] = MLX4_EN_BW_MAX;

			break;

		case IEEE_8021QAZ_TSA_STRICT:

			pg[i] = num_strict++;

			tc_tx_bw[i] = MLX4_EN_BW_MAX;

drivers/net/ethernet/mellanox/mlx4/en_netdev.c

+7 −0
Original line number Diff line number Diff line
@@ -3336,6 +3336,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 
	priv->msg_enable = MLX4_EN_MSG_LEVEL;

#ifdef CONFIG_MLX4_EN_DCB

	if (!mlx4_is_slave(priv->mdev->dev)) {

		u8 prio;



		for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {

			priv->ets.prio_tc[prio] = prio;

			priv->ets.tc_tsa[prio]  = IEEE_8021QAZ_TSA_VENDOR;

		}



		priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |

			DCB_CAP_DCBX_VER_IEEE;

		priv->flags |= MLX4_EN_DCB_ENABLED;

drivers/net/ethernet/mellanox/mlx4/mlx4_en.h

+1 −0
Original line number Diff line number Diff line
@@ -479,6 +479,7 @@ struct mlx4_en_frag_info { 
#define MLX4_EN_BW_MIN 1

#define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */



#define MLX4_EN_TC_VENDOR 0

#define MLX4_EN_TC_ETS 7



enum dcb_pfc_type {