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Commit 89c2af3c authored by John W. Linville's avatar John W. Linville
Browse files

Merge branch 'master' of...

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem

Conflicts:
	drivers/net/ethernet/broadcom/Kconfig
parents f3dfd208 d1e2586f
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+1 −1
Original line number Diff line number Diff line
@@ -4360,7 +4360,7 @@ F: drivers/net/wireless/iwlegacy/

INTEL WIRELESS WIFI LINK (iwlwifi)
M:	Johannes Berg <johannes.berg@intel.com>
M:	Wey-Yi Guy <wey-yi.w.guy@intel.com>
M:	Emmanuel Grumbach <emmanuel.grumbach@intel.com>
M:	Intel Linux Wireless <ilw@linux.intel.com>
L:	linux-wireless@vger.kernel.org
W:	http://intellinuxwireless.org
+8 −2
Original line number Diff line number Diff line
@@ -35,8 +35,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
	  PCI core hostmode operation (external PCI bus).

config BCMA_HOST_SOC
	bool
	depends on BCMA_DRIVER_MIPS
	bool "Support for BCMA in a SoC"
	depends on BCMA
	help
	  Host interface for a Broadcom AIX bus directly mapped into
	  the memory. This only works with the Broadcom SoCs from the
	  BCM47XX line.

	  If unsure, say N

config BCMA_DRIVER_MIPS
	bool "BCMA Broadcom MIPS core driver"
+1 −1
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *bus)
	err = bcma_bus_scan(bus);
	if (err) {
		bcma_err(bus, "Failed to scan: %d\n", err);
		return -1;
		return err;
	}

	/* Early init CC core */
+20 −8
Original line number Diff line number Diff line
@@ -32,6 +32,18 @@ static const struct bcma_device_id_name bcma_bcm_device_names[] = {
	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
	{ BCMA_CORE_DMA, "DMA" },
	{ BCMA_CORE_SDIO3, "SDIO3" },
	{ BCMA_CORE_USB20, "USB 2.0" },
	{ BCMA_CORE_USB30, "USB 3.0" },
	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
	{ BCMA_CORE_ROM, "ROM" },
	{ BCMA_CORE_NAND, "NAND flash controller" },
	{ BCMA_CORE_QSPI, "SPI flash controller" },
	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
	{ BCMA_CORE_INVALID, "Invalid" },
@@ -201,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 __iomem **eromptr)
	return ent;
}

static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
				  u32 type, u8 port)
{
	u32 addrl, addrh, sizel, sizeh = 0;
@@ -213,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
	    ((ent & SCAN_ADDR_TYPE) != type) ||
	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
		bcma_erom_push_ent(eromptr);
		return -EINVAL;
		return (u32)-EINVAL;
	}

	addrl = ent & SCAN_ADDR_ADDR;
@@ -261,7 +273,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
			      struct bcma_device_id *match, int core_num,
			      struct bcma_device *core)
{
	s32 tmp;
	u32 tmp;
	u8 i, j;
	s32 cia, cib;
	u8 ports[2], wrappers[2];
@@ -339,11 +351,11 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
	 * the main register space for the core
	 */
	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
	if (tmp <= 0) {
	if (tmp == 0 || IS_ERR_VALUE(tmp)) {
		/* Try again to see if it is a bridge */
		tmp = bcma_erom_get_addr_desc(bus, eromptr,
					      SCAN_ADDR_TYPE_BRIDGE, 0);
		if (tmp <= 0) {
		if (tmp == 0 || IS_ERR_VALUE(tmp)) {
			return -EILSEQ;
		} else {
			bcma_info(bus, "Bridge found\n");
@@ -357,7 +369,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
		for (j = 0; ; j++) {
			tmp = bcma_erom_get_addr_desc(bus, eromptr,
				SCAN_ADDR_TYPE_SLAVE, i);
			if (tmp < 0) {
			if (IS_ERR_VALUE(tmp)) {
				/* no more entries for port _i_ */
				/* pr_debug("erom: slave port %d "
				 * "has %d descriptors\n", i, j); */
@@ -374,7 +386,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
		for (j = 0; ; j++) {
			tmp = bcma_erom_get_addr_desc(bus, eromptr,
				SCAN_ADDR_TYPE_MWRAP, i);
			if (tmp < 0) {
			if (IS_ERR_VALUE(tmp)) {
				/* no more entries for port _i_ */
				/* pr_debug("erom: master wrapper %d "
				 * "has %d descriptors\n", i, j); */
@@ -392,7 +404,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
		for (j = 0; ; j++) {
			tmp = bcma_erom_get_addr_desc(bus, eromptr,
				SCAN_ADDR_TYPE_SWRAP, i + hack);
			if (tmp < 0) {
			if (IS_ERR_VALUE(tmp)) {
				/* no more entries for port _i_ */
				/* pr_debug("erom: master wrapper %d "
				 * has %d descriptors\n", i, j); */
+1 −1
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ config BNX2X_SRIOV

config BGMAC
	tristate "BCMA bus GBit core support"
	depends on BCMA_HOST_SOC && HAS_DMA
	depends on BCMA_HOST_SOC && HAS_DMA && BCM47XX
	select PHYLIB
	---help---
	  This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
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