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Commit 857af87d authored by Marc Zyngier's avatar Marc Zyngier Committed by Greg Kroah-Hartman
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PCI: dwc: Move interrupt acking into the proper callback 

commit 3f7bb2ec20ce07c02b2002349d256c91a463fcc5 upstream.

The write to the status register is really an ACK for the HW,
and should be treated as such by the driver. Let's move it to the
irq_ack() callback, which will prevent people from moving it around
in order to paper over other bugs.

Fixes: 8c934095 ("PCI: dwc: Clear MSI interrupt status after it is handled,
not before")
Fixes: 7c5925af ("PCI: dwc: Move MSI IRQs allocation to IRQ domains
hierarchical API")
Link: https://lore.kernel.org/linux-pci/20181113225734.8026-1-marc.zyngier@arm.com/


Reported-by: default avatarTrent Piepho <tpiepho@impinj.com>
Tested-by: default avatarNiklas Cassel <niklas.cassel@linaro.org>
Tested-by: default avatarGustavo Pimentel <gustavo.pimentel@synopsys.com>
Tested-by: default avatarStanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c408aac3

drivers/pci/controller/dwc/pcie-designware-host.c

+7 −6
Original line number Original line Diff line number Diff line
@@ -99,9 +99,6 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) 
					       (i * MAX_MSI_IRQS_PER_CTRL) +

					       (i * MAX_MSI_IRQS_PER_CTRL) +

					       pos);

					       pos);

			generic_handle_irq(irq);

			generic_handle_irq(irq);

			dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS +

						(i * MSI_REG_CTRL_BLOCK_SIZE),

					    4, 1 << pos);

			pos++;

			pos++;

		}

		}

	}

	}
@@ -200,14 +197,18 @@ static void dw_pci_bottom_unmask(struct irq_data *data) 




static void dw_pci_bottom_ack(struct irq_data *d)

static void dw_pci_bottom_ack(struct irq_data *d)

{

{

	struct msi_desc *msi = irq_data_get_msi_desc(d);

	struct pcie_port *pp  = irq_data_get_irq_chip_data(d);

	struct pcie_port *pp;

	unsigned int res, bit, ctrl;

	unsigned long flags;

	unsigned long flags;





	pp = msi_desc_to_pci_sysdata(msi);

	ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL;

	res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;

	bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;





	raw_spin_lock_irqsave(&pp->lock, flags);

	raw_spin_lock_irqsave(&pp->lock, flags);





	dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + res, 4, 1 << bit);



	if (pp->ops->msi_irq_ack)

	if (pp->ops->msi_irq_ack)

		pp->ops->msi_irq_ack(d->hwirq, pp);

		pp->ops->msi_irq_ack(d->hwirq, pp);