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Commit 812af433 authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Thomas Gleixner
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perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id 



Current logic iterates over CPUID Fn8000001d leafs (Cache Properties)
to detect the last level cache, and derive the last-level cache ID.
However, this information is already available in the cpu_llc_id.
Therefore, make use of it instead.

Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Link: http://lkml.kernel.org/r/1524864877-111962-3-git-send-email-suravee.suthikulpanit@amd.com
parent f8b64d08

arch/x86/events/amd/uncore.c

+2 −19
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#include <asm/cpufeature.h>

#include <asm/perf_event.h>

#include <asm/msr.h>

#include <asm/smp.h>



#define NUM_COUNTERS_NB		4

#define NUM_COUNTERS_L2		4
@@ -399,26 +400,8 @@ static int amd_uncore_cpu_starting(unsigned int cpu) 
	}



	if (amd_uncore_llc) {

		unsigned int apicid = cpu_data(cpu).apicid;

		unsigned int nshared, subleaf, prev_eax = 0;



		uncore = *per_cpu_ptr(amd_uncore_llc, cpu);

		/*

		 * Iterate over Cache Topology Definition leaves until no

		 * more cache descriptions are available.

		 */

		for (subleaf = 0; subleaf < 5; subleaf++) {

			cpuid_count(0x8000001d, subleaf, &eax, &ebx, &ecx, &edx);



			/* EAX[0:4] gives type of cache */

			if (!(eax & 0x1f))

				break;



			prev_eax = eax;

		}

		nshared = ((prev_eax >> 14) & 0xfff) + 1;



		uncore->id = apicid - (apicid % nshared);

		uncore->id = per_cpu(cpu_llc_id, cpu);



		uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_llc);

		*per_cpu_ptr(amd_uncore_llc, cpu) = uncore;