Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f8b64d08 authored by Borislav Petkov's avatar Borislav Petkov Committed by Thomas Gleixner
Browse files

x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present



Move smp_num_siblings and cpu_llc_id to cpu/common.c so that they're
always present as symbols and not only in the CONFIG_SMP case. Then,
other code using them doesn't need ugly ifdeffery anymore. Get rid of
some ifdeffery.

Signed-off-by: default avatarBorislav Petkov <bpetkov@suse.de>
Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1524864877-111962-2-git-send-email-suravee.suthikulpanit@amd.com
parent 60882cc1
Loading
Loading
Loading
Loading
+0 −1
Original line number Diff line number Diff line
@@ -171,7 +171,6 @@ static inline int wbinvd_on_all_cpus(void)
	wbinvd();
	return 0;
}
#define smp_num_siblings	1
#endif /* CONFIG_SMP */

extern unsigned disabled_cpus;
+1 −9
Original line number Diff line number Diff line
@@ -297,7 +297,6 @@ static int nearby_node(int apicid)
}
#endif

#ifdef CONFIG_SMP
/*
 * Fix up cpu_core_id for pre-F17h systems to be in the
 * [0 .. cores_per_node - 1] range. Not really needed but
@@ -375,7 +374,6 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
		legacy_fixup_core_id(c);
	}
}
#endif

/*
 * On a AMD dual core setup the lower bits of the APIC id distinguish the cores.
@@ -383,7 +381,6 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
 */
static void amd_detect_cmp(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
	unsigned bits;
	int cpu = smp_processor_id();

@@ -395,16 +392,11 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c)
	/* use socket ID also for last level cache */
	per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
	amd_get_topology(c);
#endif
}

u16 amd_get_nb_id(int cpu)
{
	u16 id = 0;
#ifdef CONFIG_SMP
	id = per_cpu(cpu_llc_id, cpu);
#endif
	return id;
	return per_cpu(cpu_llc_id, cpu);
}
EXPORT_SYMBOL_GPL(amd_get_nb_id);

+7 −0
Original line number Diff line number Diff line
@@ -66,6 +66,13 @@ cpumask_var_t cpu_callin_mask;
/* representing cpus for which sibling maps can be computed */
cpumask_var_t cpu_sibling_setup_mask;

/* Number of siblings per CPU package */
int smp_num_siblings = 1;
EXPORT_SYMBOL(smp_num_siblings);

/* Last level cache ID of each logical CPU */
DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID;

/* correctly size the local cpu masks */
void __init setup_cpu_local_masks(void)
{
+0 −7
Original line number Diff line number Diff line
@@ -78,13 +78,6 @@
#include <asm/misc.h>
#include <asm/qspinlock.h>

/* Number of siblings per CPU package */
int smp_num_siblings = 1;
EXPORT_SYMBOL(smp_num_siblings);

/* Last level cache ID of each logical CPU */
DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID;

/* representing HT siblings of each logical CPU */
DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);