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Commit 7df86732 authored by Chase Southwood's avatar Chase Southwood Committed by Greg Kroah-Hartman
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Staging: comedi: addi-data: tidy up digital input register map defines in hwdrv_apci1564.c 



This patch fixes the register map defines for the digital input registers
such that they are all the real offsets to each register, rather than a
mix of real offsets and adders to those offsets.

Further, some of the old defines were being used incorrectly in the
i_APCI1564_Reset() function.  Upon swapping the old defines out for the
new ones in this function, their use has been corrected.

Signed-off-by: default avatarChase Southwood <chase.southwood@yahoo.com>
Reviewed-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bf9aac53

drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c

+31 −47
Original line number Diff line number Diff line
@@ -47,11 +47,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY 
#define APCI1564_ADDRESS_RANGE				128



/* DIGITAL INPUT-OUTPUT DEFINE */

/* Input defines */

#define APCI1564_DIGITAL_IP				0x04

#define APCI1564_DIGITAL_IP_INTERRUPT_MODE1		4

#define APCI1564_DIGITAL_IP_INTERRUPT_MODE2		8

#define APCI1564_DIGITAL_IP_IRQ				16



/* Output defines */

#define APCI1564_DIGITAL_OP				0x18
@@ -63,9 +58,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY 
#define ADDIDATA_OR					0

#define ADDIDATA_AND					1



/* Digital Input Interrupt Status */

#define APCI1564_DIGITAL_IP_INTERRUPT_STATUS		12



/* Digital Output Interrupt Status */

#define APCI1564_DIGITAL_OP_INTERRUPT_STATUS		8
@@ -99,6 +91,15 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY 
#define APCI1564_TCW_WARN_TIMEVAL			24

#define APCI1564_TCW_WARN_TIMEBASE			28



/*

 * devpriv->i_IobaseAmcc Register Map

 */

#define APCI1564_DI_REG						0x04

#define APCI1564_DI_INT_MODE1_REG				0x08

#define APCI1564_DI_INT_MODE2_REG				0x0c

#define APCI1564_DI_INT_STATUS_REG				0x10

#define APCI1564_DI_IRQ_REG					0x14



/* Global variables */

static unsigned int ui_InterruptStatus_1564;

static unsigned int ui_InterruptData, ui_Type;
@@ -143,31 +144,17 @@ static int i_APCI1564_ConfigDigitalInput(struct comedi_device *dev, 
	if (data[0] == ADDIDATA_ENABLE) {

		data[2] = data[2] << 4;

		data[3] = data[3] << 4;

		outl(data[2],

			devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_INTERRUPT_MODE1);

		outl(data[3],

			devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_INTERRUPT_MODE2);

		outl(data[2], devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);

		outl(data[3], devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE2_REG);

		if (data[1] == ADDIDATA_OR) {

			outl(0x4,

				devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

				APCI1564_DIGITAL_IP_IRQ);

			outl(0x4, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

		} else {

			outl(0x6,

				devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

				APCI1564_DIGITAL_IP_IRQ);

			outl(0x6, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

		}

	} else {

		outl(0x0,

			devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_INTERRUPT_MODE1);

		outl(0x0,

			devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_INTERRUPT_MODE2);

		outl(0x0,

			devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_IRQ);

		outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);

		outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE2_REG);

		outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

	}



	return insn->n;
@@ -180,7 +167,7 @@ static int apci1564_di_insn_bits(struct comedi_device *dev, 
{

	struct addi_private *devpriv = dev->private;



	data[1] = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP);

	data[1] = inl(devpriv->i_IobaseAmcc + APCI1564_DI_REG);



	return insn->n;

}
@@ -329,9 +316,7 @@ static int i_APCI1564_ConfigTimerCounterWatchdog(struct comedi_device *dev, 
		devpriv->b_TimerSelectMode = ADDIDATA_TIMER;

		if (data[1] == 1) {

			outl(0x02, devpriv->i_IobaseAmcc + APCI1564_TIMER + APCI1564_TCW_PROG);	/* Enable TIMER int & DISABLE ALL THE OTHER int SOURCES */

			outl(0x0,

				devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

				APCI1564_DIGITAL_IP_IRQ);

			outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

			outl(0x0,

				devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +

				APCI1564_DIGITAL_OP_IRQ);
@@ -648,8 +633,7 @@ static void v_APCI1564_Interrupt(int irq, void *d) 
	unsigned int ui_C1, ui_C2, ui_C3, ui_C4;

	unsigned int ul_Command2 = 0;



	ui_DI = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

		APCI1564_DIGITAL_IP_IRQ) & 0x01;

	ui_DI = inl(devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG) & 0x01;

	ui_DO = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP +

		APCI1564_DIGITAL_OP_IRQ) & 0x01;

	ui_Timer =
@@ -669,17 +653,14 @@ static void v_APCI1564_Interrupt(int irq, void *d) 
	}



	if (ui_DI == 1) {

		ui_DI = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_IRQ);

		outl(0x0,

			devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_IRQ);

		ui_DI = inl(devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

		outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

		ui_InterruptStatus_1564 =

			inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP +

			APCI1564_DIGITAL_IP_INTERRUPT_STATUS);

			inl(devpriv->i_IobaseAmcc + APCI1564_DI_INT_STATUS_REG);

		ui_InterruptStatus_1564 = ui_InterruptStatus_1564 & 0X000FFFF0;

		send_sig(SIGIO, devpriv->tsk_Current, 0);	/*  send signal to the sample */

		outl(ui_DI, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP + APCI1564_DIGITAL_IP_IRQ);	/* enable the interrupt */

		/* enable the interrupt */

		outl(ui_DI, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

		return;

	}
@@ -829,10 +810,13 @@ static int i_APCI1564_Reset(struct comedi_device *dev) 
{

	struct addi_private *devpriv = dev->private;



	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_IRQ);	/* disable the interrupts */

	inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_STATUS);	/* Reset the interrupt status register */

	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_MODE1);	/* Disable the and/or interrupt */

	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP_INTERRUPT_MODE2);

	/* disable the interrupts */

	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);

	/* Reset the interrupt status register */

	inl(devpriv->i_IobaseAmcc + APCI1564_DI_INT_STATUS_REG);

	/* Disable the and/or interrupt */

	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);

	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE2_REG);

	devpriv->b_DigitalOutputRegister = 0;

	ui_Type = 0;

	outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP);	/* Resets the output channels */