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Commit 7ad00d1a authored by Arun Siluvery's avatar Arun Siluvery Committed by Daniel Vetter
Browse files

drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround



In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: default avatarRafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: default avatarArun Siluvery <arun.siluvery@linux.intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c4db7599
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+5 −2
Original line number Diff line number Diff line
@@ -1140,8 +1140,8 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
{
	uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);

	/* FIXME: Replace me with WA */
	wa_ctx_emit(batch, MI_NOOP);
	/* WaDisableCtxRestoreArbitration:bdw,chv */
	wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_DISABLE);

	/* Pad to end of cacheline */
	while (index % CACHELINE_DWORDS)
@@ -1179,6 +1179,9 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
{
	uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);

	/* WaDisableCtxRestoreArbitration:bdw,chv */
	wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_ENABLE);

	wa_ctx_emit(batch, MI_BATCH_BUFFER_END);

	return wa_ctx_end(wa_ctx, *offset = index, 1);