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Commit c4db7599 authored by Arun Siluvery's avatar Arun Siluvery Committed by Daniel Vetter
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drm/i915/gen8: Re-order init pipe_control in lrc mode 



Some of the WA applied using WA batch buffers perform writes to scratch page.
In the current flow WA are initialized before scratch obj is allocated.
This patch reorders intel_init_pipe_control() to have a valid scratch obj
before we initialize WA.

v2: Check for valid scratch page before initializing WA as some of them
perform writes to it.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: default avatarMichel Thierry <michel.thierry@intel.com>
Signed-off-by: default avatarArun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 17ee950d

drivers/gpu/drm/i915/intel_lrc.c

+11 −3
Original line number Diff line number Diff line
@@ -1224,6 +1224,12 @@ static int intel_init_workaround_bb(struct intel_engine_cs *ring) 


	WARN_ON(ring->id != RCS);



	/* some WA perform writes to scratch page, ensure it is valid */

	if (ring->scratch.obj == NULL) {

		DRM_ERROR("scratch page not allocated for %s\n", ring->name);

		return -EINVAL;

	}



	ret = lrc_setup_wa_ctx_obj(ring, PAGE_SIZE);

	if (ret) {

		DRM_DEBUG_DRIVER("Failed to setup context WA page: %d\n", ret);
@@ -1658,7 +1664,8 @@ static int logical_render_ring_init(struct drm_device *dev) 
	ring->emit_bb_start = gen8_emit_bb_start;



	ring->dev = dev;

	ret = logical_ring_init(dev, ring);



	ret = intel_init_pipe_control(ring);

	if (ret)

		return ret;
@@ -1673,9 +1680,10 @@ static int logical_render_ring_init(struct drm_device *dev) 
			  ret);

	}



	ret = intel_init_pipe_control(ring);

	if (ret)

	ret = logical_ring_init(dev, ring);

	if (ret) {

		lrc_destroy_wa_ctx_obj(ring);

	}



	return ret;

}