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Commit 73733847 authored by Michael Buesch's avatar Michael Buesch Committed by John W. Linville
Browse files

[PATCH] bcm43xx: fix some stuff, add a few missing mmiowb(), remove dead code. 



This may workaround the XMIT ERRORs some people are getting.

Signed-off-by: default avatarMichael Buesch <mbuesch@freenet.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 7ce942d0

drivers/net/wireless/bcm43xx/bcm43xx_dma.h

+3 −20
Original line number Diff line number Diff line
@@ -9,27 +9,10 @@ 




/* DMA-Interrupt reasons. */

/*TODO: add the missing ones. */

#define BCM43xx_DMAIRQ_ERR0		(1 << 10)

#define BCM43xx_DMAIRQ_ERR1		(1 << 11)

#define BCM43xx_DMAIRQ_ERR2		(1 << 12)

#define BCM43xx_DMAIRQ_ERR3		(1 << 13)

#define BCM43xx_DMAIRQ_ERR4		(1 << 14)

#define BCM43xx_DMAIRQ_ERR5		(1 << 15)

#define BCM43xx_DMAIRQ_FATALMASK	((1 << 10) | (1 << 11) | (1 << 12) \

					 | (1 << 14) | (1 << 15))

#define BCM43xx_DMAIRQ_NONFATALMASK	(1 << 13)

#define BCM43xx_DMAIRQ_RX_DONE		(1 << 16)

/* helpers */

#define BCM43xx_DMAIRQ_ANYERR		(BCM43xx_DMAIRQ_ERR0 | \

					 BCM43xx_DMAIRQ_ERR1 | \

					 BCM43xx_DMAIRQ_ERR2 | \

					 BCM43xx_DMAIRQ_ERR3 | \

					 BCM43xx_DMAIRQ_ERR4 | \

					 BCM43xx_DMAIRQ_ERR5)

#define BCM43xx_DMAIRQ_FATALERR		(BCM43xx_DMAIRQ_ERR0 | \

					 BCM43xx_DMAIRQ_ERR1 | \

					 BCM43xx_DMAIRQ_ERR2 | \

					 BCM43xx_DMAIRQ_ERR4 | \

					 BCM43xx_DMAIRQ_ERR5)

#define BCM43xx_DMAIRQ_NONFATALERR	BCM43xx_DMAIRQ_ERR3



/* DMA controller register offsets. (relative to BCM43xx_DMA#_BASE) */

#define BCM43xx_DMA_TX_CONTROL		0x00

drivers/net/wireless/bcm43xx/bcm43xx_ilt.c

+6 −36
Original line number Diff line number Diff line
@@ -312,18 +312,20 @@ const u16 bcm43xx_ilt_sigmasqr2[BCM43xx_ILT_SIGMASQR_SIZE] = { 


/**** Helper functions to access the device Internal Lookup Tables ****/



void bcm43xx_ilt_write16(struct bcm43xx_private *bcm, u16 offset, u16 val)

void bcm43xx_ilt_write(struct bcm43xx_private *bcm, u16 offset, u16 val)

{

	if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);

		mmiowb();

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, val);

	} else {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);

		mmiowb();

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA1, val);

	}

}



u16 bcm43xx_ilt_read16(struct bcm43xx_private *bcm, u16 offset)

u16 bcm43xx_ilt_read(struct bcm43xx_private *bcm, u16 offset)

{

	if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
@@ -333,35 +335,3 @@ u16 bcm43xx_ilt_read16(struct bcm43xx_private *bcm, u16 offset) 
		return bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA1);

	}

}
 


void bcm43xx_ilt_write32(struct bcm43xx_private *bcm, u16 offset, u32 val)

{

	if ( bcm->current_core->phy->type == BCM43xx_PHYTYPE_A ) {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA2, (u16)(val >> 16));

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, (u16)(val & 0x0000FFFF));

	} else {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA2, (u16)(val >> 16));

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA1, (u16)(val & 0x0000FFFF));

	}

}



u32 bcm43xx_ilt_read32(struct bcm43xx_private *bcm, u16 offset)

{

	u32 ret;



	if ( bcm->current_core->phy->type == BCM43xx_PHYTYPE_A ) {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);

		ret = bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_A_DATA2);

		ret <<= 16;

		ret |= bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_A_DATA1);

	} else {

		bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);

		ret = bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA2);

		ret <<= 16;

		ret |= bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA1);

	}



	return ret;

}

drivers/net/wireless/bcm43xx/bcm43xx_ilt.h

+2 −4
Original line number Diff line number Diff line
@@ -26,9 +26,7 @@ extern const u16 bcm43xx_ilt_sigmasqr1[BCM43xx_ILT_SIGMASQR_SIZE]; 
extern const u16 bcm43xx_ilt_sigmasqr2[BCM43xx_ILT_SIGMASQR_SIZE];





void bcm43xx_ilt_write16(struct bcm43xx_private *bcm, u16 offset, u16 val);

u16 bcm43xx_ilt_read16(struct bcm43xx_private *bcm, u16 offset);

void bcm43xx_ilt_write32(struct bcm43xx_private *bcm, u16 offset, u32 val);

u32 bcm43xx_ilt_read32(struct bcm43xx_private *bcm, u16 offset);

void bcm43xx_ilt_write(struct bcm43xx_private *bcm, u16 offset, u16 val);

u16 bcm43xx_ilt_read(struct bcm43xx_private *bcm, u16 offset);



#endif /* BCM43xx_ILT_H_ */

drivers/net/wireless/bcm43xx/bcm43xx_main.c

+52 −24
Original line number Diff line number Diff line
@@ -155,6 +155,7 @@ static void bcm43xx_ram_write(struct bcm43xx_private *bcm, u16 offset, u32 val) 
		val = swab32(val);



	bcm43xx_write32(bcm, BCM43xx_MMIO_RAM_CONTROL, offset);

	mmiowb();

	bcm43xx_write32(bcm, BCM43xx_MMIO_RAM_DATA, val);

}
@@ -225,9 +226,12 @@ void bcm43xx_shm_write32(struct bcm43xx_private *bcm, 
		if (offset & 0x0003) {

			/* Unaligned access */

			bcm43xx_shm_control_word(bcm, routing, offset >> 2);

			mmiowb();

			bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED,

					(value >> 16) & 0xffff);

			mmiowb();

			bcm43xx_shm_control_word(bcm, routing, (offset >> 2) + 1);

			mmiowb();

			bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA,

					value & 0xffff);

			return;
@@ -235,6 +239,7 @@ void bcm43xx_shm_write32(struct bcm43xx_private *bcm, 
		offset >>= 2;

	}

	bcm43xx_shm_control_word(bcm, routing, offset);

	mmiowb();

	bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_DATA, value);

}
@@ -246,6 +251,7 @@ void bcm43xx_shm_write16(struct bcm43xx_private *bcm, 
		if (offset & 0x0003) {

			/* Unaligned access */

			bcm43xx_shm_control_word(bcm, routing, offset >> 2);

			mmiowb();

			bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED,

					value);

			return;
@@ -253,6 +259,7 @@ void bcm43xx_shm_write16(struct bcm43xx_private *bcm, 
		offset >>= 2;

	}

	bcm43xx_shm_control_word(bcm, routing, offset);

	mmiowb();

	bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA, value);

}
@@ -311,6 +318,7 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf) 
	status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);

	status |= BCM43xx_SBF_TIME_UPDATE;

	bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);

	mmiowb();



	/* Be careful with the in-progress timer.

	 * First zero out the low register, so we have a full
@@ -320,9 +328,10 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf) 
		u32 lo = (tsf & 0x00000000FFFFFFFFULL);

		u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;



		barrier();

		bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW, 0);

		mmiowb();

		bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_HIGH, hi);

		mmiowb();

		bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW, lo);

	} else {

		u16 v0 = (tsf & 0x000000000000FFFFULL);
@@ -330,11 +339,14 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf) 
		u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;

		u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;



		barrier();

		bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_0, 0);

		mmiowb();

		bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_3, v3);

		mmiowb();

		bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_2, v2);

		mmiowb();

		bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_1, v1);

		mmiowb();

		bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_0, v0);

	}
@@ -974,6 +986,7 @@ static void bcm43xx_geo_init(struct bcm43xx_private *bcm) 
void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)

{

	struct bcm43xx_phyinfo *phy = bcm->current_core->phy;

	struct bcm43xx_radioinfo *radio = bcm->current_core->radio;

	unsigned int i, max_loop;

	u16 value = 0;

	u32 buffer[5] = {
@@ -984,6 +997,13 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm) 
		0x00000000,

	};



/* FIXME: It seems like a dummy_transmission corrupts the DMA engines,

 *        once they are initialized. So avoid doing a dummy_transmission,

 *        if the DMA engines are running.

 */

if (bcm->initialized)

return;



	switch (phy->type) {

	case BCM43xx_PHYTYPE_A:

		max_loop = 0x1E;
@@ -1015,24 +1035,28 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm) 
	bcm43xx_write16(bcm, 0x0500, 0x0000);

	bcm43xx_write16(bcm, 0x0502, 0x0030);



	if (radio->version == 0x2050 && radio->revision <= 0x5)

		bcm43xx_radio_write16(bcm, 0x0051, 0x0017);

	for (i = 0x00; i < max_loop; i++) {

		value = bcm43xx_read16(bcm, 0x050E);

		if ((value & 0x0080) != 0)

		if (value & 0x0080)

			break;

		udelay(10);

	}

	for (i = 0x00; i < 0x0A; i++) {

		value = bcm43xx_read16(bcm, 0x050E);

		if ((value & 0x0400) != 0)

		if (value & 0x0400)

			break;

		udelay(10);

	}

	for (i = 0x00; i < 0x0A; i++) {

		value = bcm43xx_read16(bcm, 0x0690);

		if ((value & 0x0100) == 0)

		if (!(value & 0x0100))

			break;

		udelay(10);

	}

	if (radio->version == 0x2050 && radio->revision <= 0x5)

		bcm43xx_radio_write16(bcm, 0x0051, 0x0037);

}



static void key_write(struct bcm43xx_private *bcm,
@@ -1646,22 +1670,6 @@ static void handle_irq_beacon(struct bcm43xx_private *bcm) 
	}

}



/* Debug helper for irq bottom-half to print all reason registers. */

#define bcmirq_print_reasons(description) \

	do {											\

		dprintkl(KERN_ERR PFX description "\n"						\

			 KERN_ERR PFX "  Generic Reason: 0x%08x\n"				\

			 KERN_ERR PFX "  DMA reasons:    0x%08x, 0x%08x, 0x%08x, 0x%08x\n"	\

			 KERN_ERR PFX "  DMA TX status:  0x%08x, 0x%08x, 0x%08x, 0x%08x\n",	\

			 reason,								\

			 dma_reason[0], dma_reason[1],						\

			 dma_reason[2], dma_reason[3],						\

			 bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_BASE + BCM43xx_DMA_TX_STATUS),	\

			 bcm43xx_read32(bcm, BCM43xx_MMIO_DMA2_BASE + BCM43xx_DMA_TX_STATUS),	\

			 bcm43xx_read32(bcm, BCM43xx_MMIO_DMA3_BASE + BCM43xx_DMA_TX_STATUS),	\

			 bcm43xx_read32(bcm, BCM43xx_MMIO_DMA4_BASE + BCM43xx_DMA_TX_STATUS));	\

	} while (0)



/* Interrupt handler bottom-half */

static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)

{
@@ -1690,9 +1698,30 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm) 
		 * on DMA or PIO queues.

		 * Maybe we get this in other error conditions, too.

		 */

		bcmirq_print_reasons("XMIT ERROR");

		printkl(KERN_ERR PFX "FATAL ERROR: BCM43xx_IRQ_XMIT_ERROR\n");

		bcmirq_handled(BCM43xx_IRQ_XMIT_ERROR);

	}

	if (unlikely((dma_reason[0] & BCM43xx_DMAIRQ_FATALMASK) |

		     (dma_reason[1] & BCM43xx_DMAIRQ_FATALMASK) |

		     (dma_reason[2] & BCM43xx_DMAIRQ_FATALMASK) |

		     (dma_reason[3] & BCM43xx_DMAIRQ_FATALMASK))) {

		printkl(KERN_ERR PFX "FATAL ERROR: Fatal DMA error: "

				     "0x%08X, 0x%08X, 0x%08X, 0x%08X\n",

		        dma_reason[0], dma_reason[1],

			dma_reason[2], dma_reason[3]);

		bcm43xx_controller_restart(bcm, "DMA error");

		bcm43xx_unlock_mmio(bcm, flags);

		return;

	}

	if (unlikely((dma_reason[0] & BCM43xx_DMAIRQ_NONFATALMASK) |

		     (dma_reason[1] & BCM43xx_DMAIRQ_NONFATALMASK) |

		     (dma_reason[2] & BCM43xx_DMAIRQ_NONFATALMASK) |

		     (dma_reason[3] & BCM43xx_DMAIRQ_NONFATALMASK))) {

		printkl(KERN_ERR PFX "DMA error: "

				     "0x%08X, 0x%08X, 0x%08X, 0x%08X\n",

		        dma_reason[0], dma_reason[1],

			dma_reason[2], dma_reason[3]);

	}



	if (reason & BCM43xx_IRQ_PS) {

		handle_irq_ps(bcm);
@@ -1780,8 +1809,6 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm) 
	bcm43xx_unlock_mmio(bcm, flags);

}



#undef bcmirq_print_reasons



static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm,

				  u32 reason, u32 mask)

{
@@ -3875,6 +3902,7 @@ static void bcm43xx_chip_reset(void *_bcm) 
void bcm43xx_controller_restart(struct bcm43xx_private *bcm, const char *reason)

{

	bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);

	bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* dummy read */

	printk(KERN_ERR PFX "Controller RESET (%s) ...\n", reason);

	INIT_WORK(&bcm->restart_work, bcm43xx_chip_reset, bcm);

	schedule_work(&bcm->restart_work);

drivers/net/wireless/bcm43xx/bcm43xx_phy.c

+94 −93
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@ u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset) 
void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)

{

	bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);

	mmiowb();

	bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);

}
@@ -255,16 +256,16 @@ static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm) 
	if (phy->rev == 1)

		offset = 0x4C00;



	bcm43xx_ilt_write16(bcm, offset, 0x00FE);

	bcm43xx_ilt_write16(bcm, offset + 1, 0x000D);

	bcm43xx_ilt_write16(bcm, offset + 2, 0x0013);

	bcm43xx_ilt_write16(bcm, offset + 3, 0x0019);

	bcm43xx_ilt_write(bcm, offset, 0x00FE);

	bcm43xx_ilt_write(bcm, offset + 1, 0x000D);

	bcm43xx_ilt_write(bcm, offset + 2, 0x0013);

	bcm43xx_ilt_write(bcm, offset + 3, 0x0019);



	if (phy->rev == 1) {

		bcm43xx_ilt_write16(bcm, 0x1800, 0x2710);

		bcm43xx_ilt_write16(bcm, 0x1801, 0x9B83);

		bcm43xx_ilt_write16(bcm, 0x1802, 0x9B83);

		bcm43xx_ilt_write16(bcm, 0x1803, 0x0F8D);

		bcm43xx_ilt_write(bcm, 0x1800, 0x2710);

		bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);

		bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);

		bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);

		bcm43xx_phy_write(bcm, 0x0455, 0x0004);

	}
@@ -317,10 +318,10 @@ static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm) 
		bcm43xx_phy_write(bcm, 0x048D, 0x0002);

	}



	bcm43xx_ilt_write16(bcm, offset + 0x0800, 0);

	bcm43xx_ilt_write16(bcm, offset + 0x0801, 7);

	bcm43xx_ilt_write16(bcm, offset + 0x0802, 16);

	bcm43xx_ilt_write16(bcm, offset + 0x0803, 28);

	bcm43xx_ilt_write(bcm, offset + 0x0800, 0);

	bcm43xx_ilt_write(bcm, offset + 0x0801, 7);

	bcm43xx_ilt_write(bcm, offset + 0x0802, 16);

	bcm43xx_ilt_write(bcm, offset + 0x0803, 28);

}



static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
@@ -337,11 +338,11 @@ static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm) 
		bcm43xx_phy_write(bcm, 0x0427, 0x001A);



		for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);

			bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);

		for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);

			bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);

		for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);

			bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);

	} else {

		/* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */

		bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
@@ -357,36 +358,36 @@ static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm) 
		bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);



		for (i = 0; i < 64; i++)

			bcm43xx_ilt_write16(bcm, 0x4000 + i, i);

			bcm43xx_ilt_write(bcm, 0x4000 + i, i);

		for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);

			bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);

	}

	

	if (phy->rev <= 2)

		for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);

			bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);

	else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))

		for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);

			bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);

	else

		for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);

			bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);

	

	if (phy->rev == 2)

		for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);

			bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);

	else if ((phy->rev > 2) && (phy->rev <= 7))

		for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);

			bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);

	

	if (phy->rev == 1) {

		for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);

			bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);

		for (i = 0; i < 4; i++) {

			bcm43xx_ilt_write16(bcm, 0x5404 + i, 0x0020);

			bcm43xx_ilt_write16(bcm, 0x5408 + i, 0x0020);

			bcm43xx_ilt_write16(bcm, 0x540C + i, 0x0020);

			bcm43xx_ilt_write16(bcm, 0x5410 + i, 0x0020);

			bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);

			bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);

			bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);

			bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);

		}

		bcm43xx_phy_agcsetup(bcm);
@@ -395,24 +396,24 @@ static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm) 
		    (bcm->board_revision == 0x0017))

			return;



		bcm43xx_ilt_write16(bcm, 0x5001, 0x0002);

		bcm43xx_ilt_write16(bcm, 0x5002, 0x0001);

		bcm43xx_ilt_write(bcm, 0x5001, 0x0002);

		bcm43xx_ilt_write(bcm, 0x5002, 0x0001);

	} else {

		for (i = 0; i <= 0x2F; i++)

			bcm43xx_ilt_write16(bcm, 0x1000 + i, 0x0820);

			bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);

		bcm43xx_phy_agcsetup(bcm);

		bcm43xx_phy_read(bcm, 0x0400); /* dummy read */

		bcm43xx_phy_write(bcm, 0x0403, 0x1000);

		bcm43xx_ilt_write16(bcm, 0x3C02, 0x000F);

		bcm43xx_ilt_write16(bcm, 0x3C03, 0x0014);

		bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);

		bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);



		if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&

		    (bcm->board_type == 0x0416) &&

		    (bcm->board_revision == 0x0017))

			return;



		bcm43xx_ilt_write16(bcm, 0x0401, 0x0002);

		bcm43xx_ilt_write16(bcm, 0x0402, 0x0001);

		bcm43xx_ilt_write(bcm, 0x0401, 0x0002);

		bcm43xx_ilt_write(bcm, 0x0402, 0x0001);

	}

}
@@ -456,11 +457,11 @@ static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm) 
		bcm43xx_phy_write(bcm, 0x0035, 0x03FF);

		bcm43xx_phy_write(bcm, 0x0036, 0x0400);



		bcm43xx_ilt_write16(bcm, 0x3807, 0x0051);

		bcm43xx_ilt_write(bcm, 0x3807, 0x0051);



		bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);

		bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);

		bcm43xx_ilt_write16(bcm, 0x3C0C, 0x07BF);

		bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);

		bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);



		bcm43xx_phy_write(bcm, 0x0024, 0x4680);
@@ -472,47 +473,47 @@ static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm) 
		bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);

		bcm43xx_phy_write(bcm, 0x008E, 0x58C1);



		bcm43xx_ilt_write16(bcm, 0x0803, 0x000F);

		bcm43xx_ilt_write16(bcm, 0x0804, 0x001F);

		bcm43xx_ilt_write16(bcm, 0x0805, 0x002A);

		bcm43xx_ilt_write16(bcm, 0x0805, 0x0030);

		bcm43xx_ilt_write16(bcm, 0x0807, 0x003A);

		bcm43xx_ilt_write(bcm, 0x0803, 0x000F);

		bcm43xx_ilt_write(bcm, 0x0804, 0x001F);

		bcm43xx_ilt_write(bcm, 0x0805, 0x002A);

		bcm43xx_ilt_write(bcm, 0x0805, 0x0030);

		bcm43xx_ilt_write(bcm, 0x0807, 0x003A);



		bcm43xx_ilt_write16(bcm, 0x0000, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0001, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0002, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0003, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0004, 0x0015);

		bcm43xx_ilt_write16(bcm, 0x0005, 0x0015);

		bcm43xx_ilt_write16(bcm, 0x0006, 0x0019);

		bcm43xx_ilt_write(bcm, 0x0000, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0001, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0002, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0003, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0004, 0x0015);

		bcm43xx_ilt_write(bcm, 0x0005, 0x0015);

		bcm43xx_ilt_write(bcm, 0x0006, 0x0019);



		bcm43xx_ilt_write16(bcm, 0x0404, 0x0003);

		bcm43xx_ilt_write16(bcm, 0x0405, 0x0003);

		bcm43xx_ilt_write16(bcm, 0x0406, 0x0007);

		bcm43xx_ilt_write(bcm, 0x0404, 0x0003);

		bcm43xx_ilt_write(bcm, 0x0405, 0x0003);

		bcm43xx_ilt_write(bcm, 0x0406, 0x0007);



		for (i = 0; i < 16; i++)

			bcm43xx_ilt_write16(bcm, 0x4000 + i, (0x8 + i) & 0x000F);

			bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);



		bcm43xx_ilt_write16(bcm, 0x3003, 0x1044);

		bcm43xx_ilt_write16(bcm, 0x3004, 0x7201);

		bcm43xx_ilt_write16(bcm, 0x3006, 0x0040);

		bcm43xx_ilt_write16(bcm, 0x3001, (bcm43xx_ilt_read16(bcm, 0x3001) & 0x0010) | 0x0008);

		bcm43xx_ilt_write(bcm, 0x3003, 0x1044);

		bcm43xx_ilt_write(bcm, 0x3004, 0x7201);

		bcm43xx_ilt_write(bcm, 0x3006, 0x0040);

		bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);



		for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);

			bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);

		for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);

			bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);

		for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);

			bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);

		bcm43xx_phy_init_noisescaletbl(bcm);

		for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);

			bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);

		break;

	case 3:

		for (i = 0; i < 64; i++)

			bcm43xx_ilt_write16(bcm, 0x4000 + i, i);

			bcm43xx_ilt_write(bcm, 0x4000 + i, i);



		bcm43xx_ilt_write16(bcm, 0x3807, 0x0051);

		bcm43xx_ilt_write(bcm, 0x3807, 0x0051);



		bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);

		bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
@@ -524,35 +525,35 @@ static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm) 
		bcm43xx_phy_write(bcm, 0x001F, 0x1C00);

		bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);



		bcm43xx_ilt_write16(bcm, 0x3001, (bcm43xx_ilt_read16(bcm, 0x3001) & 0x0010) | 0x0008);

		bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);

		for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);

			bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);

		bcm43xx_phy_init_noisescaletbl(bcm);

		for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)

			bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);

			bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);



		bcm43xx_phy_write(bcm, 0x0003, 0x1808);



		bcm43xx_ilt_write16(bcm, 0x0803, 0x000F);

		bcm43xx_ilt_write16(bcm, 0x0804, 0x001F);

		bcm43xx_ilt_write16(bcm, 0x0805, 0x002A);

		bcm43xx_ilt_write16(bcm, 0x0805, 0x0030);

		bcm43xx_ilt_write16(bcm, 0x0807, 0x003A);



		bcm43xx_ilt_write16(bcm, 0x0000, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0001, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0002, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0003, 0x0013);

		bcm43xx_ilt_write16(bcm, 0x0004, 0x0015);

		bcm43xx_ilt_write16(bcm, 0x0005, 0x0015);

		bcm43xx_ilt_write16(bcm, 0x0006, 0x0019);



		bcm43xx_ilt_write16(bcm, 0x0404, 0x0003);

		bcm43xx_ilt_write16(bcm, 0x0405, 0x0003);

		bcm43xx_ilt_write16(bcm, 0x0406, 0x0007);



		bcm43xx_ilt_write16(bcm, 0x3C02, 0x000F);

		bcm43xx_ilt_write16(bcm, 0x3C03, 0x0014);

		bcm43xx_ilt_write(bcm, 0x0803, 0x000F);

		bcm43xx_ilt_write(bcm, 0x0804, 0x001F);

		bcm43xx_ilt_write(bcm, 0x0805, 0x002A);

		bcm43xx_ilt_write(bcm, 0x0805, 0x0030);

		bcm43xx_ilt_write(bcm, 0x0807, 0x003A);



		bcm43xx_ilt_write(bcm, 0x0000, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0001, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0002, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0003, 0x0013);

		bcm43xx_ilt_write(bcm, 0x0004, 0x0015);

		bcm43xx_ilt_write(bcm, 0x0005, 0x0015);

		bcm43xx_ilt_write(bcm, 0x0006, 0x0019);



		bcm43xx_ilt_write(bcm, 0x0404, 0x0003);

		bcm43xx_ilt_write(bcm, 0x0405, 0x0003);

		bcm43xx_ilt_write(bcm, 0x0406, 0x0007);



		bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);

		bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);

		break;

	default:

		assert(0);
@@ -598,19 +599,19 @@ static void bcm43xx_phy_inita(struct bcm43xx_private *bcm) 
		bcm43xx_radio_write16(bcm, 0x0019, 0x0000);

		bcm43xx_radio_write16(bcm, 0x0017, 0x0020);



		tval = bcm43xx_ilt_read16(bcm, 0x3001);

		tval = bcm43xx_ilt_read(bcm, 0x3001);

		if (phy->rev == 1) {

			bcm43xx_ilt_write16(bcm, 0x3001,

					    (bcm43xx_ilt_read16(bcm, 0x3001) & 0xFF87)

			bcm43xx_ilt_write(bcm, 0x3001,

					  (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)

					  | 0x0058);

		} else {

			bcm43xx_ilt_write16(bcm, 0x3001,

					    (bcm43xx_ilt_read16(bcm, 0x3001) & 0xFFC3)

			bcm43xx_ilt_write(bcm, 0x3001,

					  (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)

					  | 0x002C);

		}

		bcm43xx_dummy_transmission(bcm);

		phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);

		bcm43xx_ilt_write16(bcm, 0x3001, tval);

		bcm43xx_ilt_write(bcm, 0x3001, tval);



		bcm43xx_radio_set_txpower_a(bcm, 0x0018);

	}