Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7ce942d0 authored by Michael Buesch's avatar Michael Buesch Committed by John W. Linville
Browse files

[PATCH] bcm43xx: Remove the mmio access printing facility overhead.

parent efccb647
Loading
Loading
Loading
Loading
+6 −95
Original line number Diff line number Diff line
@@ -718,8 +718,6 @@ struct bcm43xx_private {
	/* Debugging stuff follows. */
#ifdef CONFIG_BCM43XX_DEBUG
	struct bcm43xx_dfsentry *dfsentry;
	atomic_t mmio_print_cnt;
	atomic_t pcicfg_print_cnt;
#endif
};

@@ -805,141 +803,54 @@ struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy,
}


/* MMIO read/write functions. Debug and non-debug variants. */
#ifdef CONFIG_BCM43XX_DEBUG

static inline
u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset)
{
	u16 value;

	value = ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
	if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
		printk(KERN_INFO PFX "ioread16   offset: 0x%04x, value: 0x%04x\n",
		       offset, value);
	}

	return value;
	return ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
}

static inline
void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value)
{
	iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset);
	if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
		printk(KERN_INFO PFX "iowrite16  offset: 0x%04x, value: 0x%04x\n",
		       offset, value);
	}
}

static inline
u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset)
{
	u32 value;

	value = ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
	if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
		printk(KERN_INFO PFX "ioread32   offset: 0x%04x, value: 0x%08x\n",
		       offset, value);
	}

	return value;
	return ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
}

static inline
void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value)
{
	iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset);
	if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
		printk(KERN_INFO PFX "iowrite32  offset: 0x%04x, value: 0x%08x\n",
		       offset, value);
	}
}

static inline
int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value)
{
	int err;

	err = pci_read_config_word(bcm->pci_dev, offset, value);
	if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
		printk(KERN_INFO PFX "pciread16   offset: 0x%08x, value: 0x%04x, err: %d\n",
		       offset, *value, err);
	}

	return err;
	return pci_read_config_word(bcm->pci_dev, offset, value);
}

static inline
int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value)
{
	int err;

	err = pci_read_config_dword(bcm->pci_dev, offset, value);
	if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
		printk(KERN_INFO PFX "pciread32   offset: 0x%08x, value: 0x%08x, err: %d\n",
		       offset, *value, err);
	}

	return err;
	return pci_read_config_dword(bcm->pci_dev, offset, value);
}

static inline
int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value)
{
	int err;

	err = pci_write_config_word(bcm->pci_dev, offset, value);
	if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
		printk(KERN_INFO PFX "pciwrite16  offset: 0x%08x, value: 0x%04x, err: %d\n",
		       offset, value, err);
	}

	return err;
	return pci_write_config_word(bcm->pci_dev, offset, value);
}

static inline
int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value)
{
	int err;

	err = pci_write_config_dword(bcm->pci_dev, offset, value);
	if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
		printk(KERN_INFO PFX "pciwrite32  offset: 0x%08x, value: 0x%08x, err: %d\n",
		       offset, value, err);
	}

	return err;
	return pci_write_config_dword(bcm->pci_dev, offset, value);
}

#define bcm43xx_mmioprint_initial(bcm, value)	atomic_set(&(bcm)->mmio_print_cnt, (value))
#define bcm43xx_mmioprint_enable(bcm)		atomic_inc(&(bcm)->mmio_print_cnt)
#define bcm43xx_mmioprint_disable(bcm)		atomic_dec(&(bcm)->mmio_print_cnt)
#define bcm43xx_pciprint_initial(bcm, value)	atomic_set(&(bcm)->pcicfg_print_cnt, (value))
#define bcm43xx_pciprint_enable(bcm)		atomic_inc(&(bcm)->pcicfg_print_cnt)
#define bcm43xx_pciprint_disable(bcm)		atomic_dec(&(bcm)->pcicfg_print_cnt)

#else /* CONFIG_BCM43XX_DEBUG*/

#define bcm43xx_read16(bcm, offset)		ioread16((bcm)->mmio_addr + core_offset(bcm) + (offset))
#define bcm43xx_write16(bcm, offset, value)	iowrite16((value), (bcm)->mmio_addr + core_offset(bcm) + (offset))
#define bcm43xx_read32(bcm, offset)		ioread32((bcm)->mmio_addr + core_offset(bcm) + (offset))
#define bcm43xx_write32(bcm, offset, value)	iowrite32((value), (bcm)->mmio_addr + core_offset(bcm) + (offset))
#define bcm43xx_pci_read_config16(bcm, o, v)	pci_read_config_word((bcm)->pci_dev, (o), (v))
#define bcm43xx_pci_read_config32(bcm, o, v)	pci_read_config_dword((bcm)->pci_dev, (o), (v))
#define bcm43xx_pci_write_config16(bcm, o, v)	pci_write_config_word((bcm)->pci_dev, (o), (v))
#define bcm43xx_pci_write_config32(bcm, o, v)	pci_write_config_dword((bcm)->pci_dev, (o), (v))

#define bcm43xx_mmioprint_initial(x, y)		do { /* nothing */ } while (0)
#define bcm43xx_mmioprint_enable(x)		do { /* nothing */ } while (0)
#define bcm43xx_mmioprint_disable(x)		do { /* nothing */ } while (0)
#define bcm43xx_pciprint_initial(bcm, value)	do { /* nothing */ } while (0)
#define bcm43xx_pciprint_enable(bcm)		do { /* nothing */ } while (0)
#define bcm43xx_pciprint_disable(bcm)		do { /* nothing */ } while (0)

#endif /* CONFIG_BCM43XX_DEBUG*/


/** Limit a value between two limits */
#ifdef limit_value
# undef limit_value
+0 −35
Original line number Diff line number Diff line
@@ -2018,12 +2018,6 @@ static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm)
	const u32 *data;
	unsigned int i, len;

#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
	bcm43xx_mmioprint_enable(bcm);
#else
	bcm43xx_mmioprint_disable(bcm);
#endif

	/* Upload Microcode. */
	data = (u32 *)(bcm->ucode->data);
	len = bcm->ucode->size / sizeof(u32);
@@ -2045,12 +2039,6 @@ static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm)
				be32_to_cpu(data[i]));
		udelay(10);
	}

#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
	bcm43xx_mmioprint_disable(bcm);
#else
	bcm43xx_mmioprint_enable(bcm);
#endif
}

static int bcm43xx_write_initvals(struct bcm43xx_private *bcm,
@@ -2090,12 +2078,6 @@ static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm)
{
	int err;

#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
	bcm43xx_mmioprint_enable(bcm);
#else
	bcm43xx_mmioprint_disable(bcm);
#endif

	err = bcm43xx_write_initvals(bcm, (struct bcm43xx_initval *)bcm->initvals0->data,
				     bcm->initvals0->size / sizeof(struct bcm43xx_initval));
	if (err)
@@ -2106,13 +2088,7 @@ static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm)
		if (err)
			goto out;
	}

out:
#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
	bcm43xx_mmioprint_disable(bcm);
#else
	bcm43xx_mmioprint_enable(bcm);
#endif
	return err;
}

@@ -3728,17 +3704,6 @@ static int bcm43xx_init_private(struct bcm43xx_private *bcm,
	bcm->softmac = ieee80211_priv(net_dev);
	bcm->softmac->set_channel = bcm43xx_ieee80211_set_chan;

#ifdef DEBUG_ENABLE_MMIO_PRINT
	bcm43xx_mmioprint_initial(bcm, 1);
#else
	bcm43xx_mmioprint_initial(bcm, 0);
#endif
#ifdef DEBUG_ENABLE_PCILOG
	bcm43xx_pciprint_initial(bcm, 1);
#else
	bcm43xx_pciprint_initial(bcm, 0);
#endif

	bcm->irq_savedstate = BCM43xx_IRQ_INITIAL;
	bcm->pci_dev = pci_dev;
	bcm->net_dev = net_dev;