Loading arch/arm/mach-s5p6442/include/mach/map.h +3 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,9 @@ #define S5P6442_PA_VIC1 (0xE4100000) #define S5P6442_PA_VIC2 (0xE4200000) #define S5P6442_PA_SROMC (0xE7000000) #define S5P_PA_SROMC S5P6442_PA_SROMC #define S5P6442_PA_MDMA 0xE8000000 #define S5P6442_PA_PDMA 0xE9000000 Loading arch/arm/mach-s5p64x0/include/mach/map.h +3 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,9 @@ #define S5P64X0_PA_VIC0 (0xE4000000) #define S5P64X0_PA_VIC1 (0xE4100000) #define S5P64X0_PA_SROMC (0xE7000000) #define S5P_PA_SROMC S5P64X0_PA_SROMC #define S5P64X0_PA_PDMA (0xE9000000) #define S5P64X0_PA_TIMER (0xEA000000) Loading arch/arm/mach-s5pc100/include/mach/map.h +2 −0 Original line number Diff line number Diff line Loading @@ -55,6 +55,8 @@ #define S5PC100_VA_VIC_OFFSET 0x10000 #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) #define S5PC100_PA_SROMC (0xE7000000) #define S5P_PA_SROMC S5PC100_PA_SROMC #define S5PC100_PA_ONENAND (0xE7100000) Loading arch/arm/mach-s5pv210/clock.c +6 −0 Original line number Diff line number Diff line Loading @@ -525,6 +525,12 @@ static struct clk init_clocks[] = { .parent = &clk_pclk_psys.clk, .enable = s5pv210_clk_ip3_ctrl, .ctrlbit = (1 << 20), }, { .name = "sromc", .id = -1, .parent = &clk_hclk_psys.clk, .enable = s5pv210_clk_ip1_ctrl, .ctrlbit = (1 << 26), }, }; Loading arch/arm/mach-s5pv210/cpu.c +0 −5 Original line number Diff line number Diff line Loading @@ -80,11 +80,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { .pfn = __phys_to_pfn(S3C_PA_UART), .length = SZ_512K, .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_SROMC, .pfn = __phys_to_pfn(S5PV210_PA_SROMC), .length = SZ_4K, .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_DMC0, .pfn = __phys_to_pfn(S5PV210_PA_DMC0), Loading Loading
arch/arm/mach-s5p6442/include/mach/map.h +3 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,9 @@ #define S5P6442_PA_VIC1 (0xE4100000) #define S5P6442_PA_VIC2 (0xE4200000) #define S5P6442_PA_SROMC (0xE7000000) #define S5P_PA_SROMC S5P6442_PA_SROMC #define S5P6442_PA_MDMA 0xE8000000 #define S5P6442_PA_PDMA 0xE9000000 Loading
arch/arm/mach-s5p64x0/include/mach/map.h +3 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,9 @@ #define S5P64X0_PA_VIC0 (0xE4000000) #define S5P64X0_PA_VIC1 (0xE4100000) #define S5P64X0_PA_SROMC (0xE7000000) #define S5P_PA_SROMC S5P64X0_PA_SROMC #define S5P64X0_PA_PDMA (0xE9000000) #define S5P64X0_PA_TIMER (0xEA000000) Loading
arch/arm/mach-s5pc100/include/mach/map.h +2 −0 Original line number Diff line number Diff line Loading @@ -55,6 +55,8 @@ #define S5PC100_VA_VIC_OFFSET 0x10000 #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) #define S5PC100_PA_SROMC (0xE7000000) #define S5P_PA_SROMC S5PC100_PA_SROMC #define S5PC100_PA_ONENAND (0xE7100000) Loading
arch/arm/mach-s5pv210/clock.c +6 −0 Original line number Diff line number Diff line Loading @@ -525,6 +525,12 @@ static struct clk init_clocks[] = { .parent = &clk_pclk_psys.clk, .enable = s5pv210_clk_ip3_ctrl, .ctrlbit = (1 << 20), }, { .name = "sromc", .id = -1, .parent = &clk_hclk_psys.clk, .enable = s5pv210_clk_ip1_ctrl, .ctrlbit = (1 << 26), }, }; Loading
arch/arm/mach-s5pv210/cpu.c +0 −5 Original line number Diff line number Diff line Loading @@ -80,11 +80,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { .pfn = __phys_to_pfn(S3C_PA_UART), .length = SZ_512K, .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_SROMC, .pfn = __phys_to_pfn(S5PV210_PA_SROMC), .length = SZ_4K, .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_DMC0, .pfn = __phys_to_pfn(S5PV210_PA_DMC0), Loading