Loading arch/arm/mach-s3c64xx/irq-eint.c +19 −18 Original line number Diff line number Diff line Loading @@ -30,41 +30,41 @@ #include <plat/pm.h> #define eint_offset(irq) ((irq) - IRQ_EINT(0)) #define eint_irq_to_bit(irq) (1 << eint_offset(irq)) #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) static inline void s3c_irq_eint_mask(unsigned int irq) static inline void s3c_irq_eint_mask(struct irq_data *data) { u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); mask |= eint_irq_to_bit(irq); mask |= (u32)data->chip_data; __raw_writel(mask, S3C64XX_EINT0MASK); } static void s3c_irq_eint_unmask(unsigned int irq) static void s3c_irq_eint_unmask(struct irq_data *data) { u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); mask &= ~eint_irq_to_bit(irq); mask &= ~((u32)data->chip_data); __raw_writel(mask, S3C64XX_EINT0MASK); } static inline void s3c_irq_eint_ack(unsigned int irq) static inline void s3c_irq_eint_ack(struct irq_data *data) { __raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND); __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND); } static void s3c_irq_eint_maskack(unsigned int irq) static void s3c_irq_eint_maskack(struct irq_data *data) { /* compiler should in-line these */ s3c_irq_eint_mask(irq); s3c_irq_eint_ack(irq); s3c_irq_eint_mask(data); s3c_irq_eint_ack(data); } static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type) { int offs = eint_offset(irq); int offs = eint_offset(data->irq); int pin, pin_val; int shift; u32 ctrl, mask; Loading Loading @@ -140,12 +140,12 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) static struct irq_chip s3c_irq_eint = { .name = "s3c-eint", .mask = s3c_irq_eint_mask, .unmask = s3c_irq_eint_unmask, .mask_ack = s3c_irq_eint_maskack, .ack = s3c_irq_eint_ack, .set_type = s3c_irq_eint_set_type, .set_wake = s3c_irqext_wake, .irq_mask = s3c_irq_eint_mask, .irq_unmask = s3c_irq_eint_unmask, .irq_mask_ack = s3c_irq_eint_maskack, .irq_ack = s3c_irq_eint_ack, .irq_set_type = s3c_irq_eint_set_type, .irq_set_wake = s3c_irqext_wake, }; /* s3c_irq_demux_eint Loading Loading @@ -198,6 +198,7 @@ static int __init s3c64xx_init_irq_eint(void) for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { set_irq_chip(irq, &s3c_irq_eint); set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq)); set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } Loading arch/arm/mach-s5pv310/irq-eint.c +1 −1 Original line number Diff line number Diff line Loading @@ -152,7 +152,7 @@ static struct irq_chip s5pv310_irq_eint = { .ack = s5pv310_irq_eint_ack, .set_type = s5pv310_irq_eint_set_type, #ifdef CONFIG_PM .set_wake = s3c_irqext_wake, .irq_set_wake = s3c_irqext_wake, #endif }; Loading arch/arm/plat-s3c24xx/irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -238,7 +238,7 @@ static struct irq_chip s3c_irqext_chip = { .unmask = s3c_irqext_unmask, .ack = s3c_irqext_ack, .set_type = s3c_irqext_type, .set_wake = s3c_irqext_wake .irq_set_wake = s3c_irqext_wake }; static struct irq_chip s3c_irq_eint0t4 = { Loading arch/arm/plat-s5p/irq-eint.c +2 −2 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ static struct irq_chip s5p_irq_eint = { .ack = s5p_irq_eint_ack, .set_type = s5p_irq_eint_set_type, #ifdef CONFIG_PM .set_wake = s3c_irqext_wake, .irq_set_wake = s3c_irqext_wake, #endif }; Loading Loading @@ -194,7 +194,7 @@ static struct irq_chip s5p_irq_vic_eint = { .ack = s5p_irq_vic_eint_ack, .set_type = s5p_irq_eint_set_type, #ifdef CONFIG_PM .set_wake = s3c_irqext_wake, .irq_set_wake = s3c_irqext_wake, #endif }; Loading arch/arm/plat-samsung/Kconfig +8 −0 Original line number Diff line number Diff line Loading @@ -333,4 +333,12 @@ config SAMSUNG_WAKEMASK and above. This code allows a set of interrupt to wakeup-mask mappings. See <plat/wakeup-mask.h> comment "Power Domain" config SAMSUNG_PD bool "Samsung Power Domain" depends on PM_RUNTIME help Say Y here if you want to control Power Domain by Runtime PM. endif Loading
arch/arm/mach-s3c64xx/irq-eint.c +19 −18 Original line number Diff line number Diff line Loading @@ -30,41 +30,41 @@ #include <plat/pm.h> #define eint_offset(irq) ((irq) - IRQ_EINT(0)) #define eint_irq_to_bit(irq) (1 << eint_offset(irq)) #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) static inline void s3c_irq_eint_mask(unsigned int irq) static inline void s3c_irq_eint_mask(struct irq_data *data) { u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); mask |= eint_irq_to_bit(irq); mask |= (u32)data->chip_data; __raw_writel(mask, S3C64XX_EINT0MASK); } static void s3c_irq_eint_unmask(unsigned int irq) static void s3c_irq_eint_unmask(struct irq_data *data) { u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); mask &= ~eint_irq_to_bit(irq); mask &= ~((u32)data->chip_data); __raw_writel(mask, S3C64XX_EINT0MASK); } static inline void s3c_irq_eint_ack(unsigned int irq) static inline void s3c_irq_eint_ack(struct irq_data *data) { __raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND); __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND); } static void s3c_irq_eint_maskack(unsigned int irq) static void s3c_irq_eint_maskack(struct irq_data *data) { /* compiler should in-line these */ s3c_irq_eint_mask(irq); s3c_irq_eint_ack(irq); s3c_irq_eint_mask(data); s3c_irq_eint_ack(data); } static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type) { int offs = eint_offset(irq); int offs = eint_offset(data->irq); int pin, pin_val; int shift; u32 ctrl, mask; Loading Loading @@ -140,12 +140,12 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) static struct irq_chip s3c_irq_eint = { .name = "s3c-eint", .mask = s3c_irq_eint_mask, .unmask = s3c_irq_eint_unmask, .mask_ack = s3c_irq_eint_maskack, .ack = s3c_irq_eint_ack, .set_type = s3c_irq_eint_set_type, .set_wake = s3c_irqext_wake, .irq_mask = s3c_irq_eint_mask, .irq_unmask = s3c_irq_eint_unmask, .irq_mask_ack = s3c_irq_eint_maskack, .irq_ack = s3c_irq_eint_ack, .irq_set_type = s3c_irq_eint_set_type, .irq_set_wake = s3c_irqext_wake, }; /* s3c_irq_demux_eint Loading Loading @@ -198,6 +198,7 @@ static int __init s3c64xx_init_irq_eint(void) for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { set_irq_chip(irq, &s3c_irq_eint); set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq)); set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } Loading
arch/arm/mach-s5pv310/irq-eint.c +1 −1 Original line number Diff line number Diff line Loading @@ -152,7 +152,7 @@ static struct irq_chip s5pv310_irq_eint = { .ack = s5pv310_irq_eint_ack, .set_type = s5pv310_irq_eint_set_type, #ifdef CONFIG_PM .set_wake = s3c_irqext_wake, .irq_set_wake = s3c_irqext_wake, #endif }; Loading
arch/arm/plat-s3c24xx/irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -238,7 +238,7 @@ static struct irq_chip s3c_irqext_chip = { .unmask = s3c_irqext_unmask, .ack = s3c_irqext_ack, .set_type = s3c_irqext_type, .set_wake = s3c_irqext_wake .irq_set_wake = s3c_irqext_wake }; static struct irq_chip s3c_irq_eint0t4 = { Loading
arch/arm/plat-s5p/irq-eint.c +2 −2 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ static struct irq_chip s5p_irq_eint = { .ack = s5p_irq_eint_ack, .set_type = s5p_irq_eint_set_type, #ifdef CONFIG_PM .set_wake = s3c_irqext_wake, .irq_set_wake = s3c_irqext_wake, #endif }; Loading Loading @@ -194,7 +194,7 @@ static struct irq_chip s5p_irq_vic_eint = { .ack = s5p_irq_vic_eint_ack, .set_type = s5p_irq_eint_set_type, #ifdef CONFIG_PM .set_wake = s3c_irqext_wake, .irq_set_wake = s3c_irqext_wake, #endif }; Loading
arch/arm/plat-samsung/Kconfig +8 −0 Original line number Diff line number Diff line Loading @@ -333,4 +333,12 @@ config SAMSUNG_WAKEMASK and above. This code allows a set of interrupt to wakeup-mask mappings. See <plat/wakeup-mask.h> comment "Power Domain" config SAMSUNG_PD bool "Samsung Power Domain" depends on PM_RUNTIME help Say Y here if you want to control Power Domain by Runtime PM. endif