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Commit 716d9b1d authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branch 'clk-divider-container' into clk-next 

* clk-divider-container:
  clk: divider: fix incorrect usage of container_of

Plus fixup sprd/div.c to pass the width too.
parents 00030464 12a26c29

drivers/clk/clk-divider.c

+3 −4
Original line number Diff line number Diff line
@@ -118,12 +118,11 @@ static unsigned int _get_val(const struct clk_div_table *table, 
unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,

				  unsigned int val,

				  const struct clk_div_table *table,

				  unsigned long flags)

				  unsigned long flags, unsigned long width)

{

	struct clk_divider *divider = to_clk_divider(hw);

	unsigned int div;



	div = _get_div(table, val, flags, divider->width);

	div = _get_div(table, val, flags, width);

	if (!div) {

		WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),

			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
@@ -145,7 +144,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, 
	val &= div_mask(divider->width);



	return divider_recalc_rate(hw, parent_rate, val, divider->table,

				   divider->flags);

				   divider->flags, divider->width);

}



static bool _is_valid_table_div(const struct clk_div_table *table,

drivers/clk/hisilicon/clkdivider-hi6220.c

+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static unsigned long hi6220_clkdiv_recalc_rate(struct clk_hw *hw, 
	val &= div_mask(dclk->width);



	return divider_recalc_rate(hw, parent_rate, val, dclk->table,

				   CLK_DIVIDER_ROUND_CLOSEST);

				   CLK_DIVIDER_ROUND_CLOSEST, dclk->width);

}



static long hi6220_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate,

drivers/clk/nxp/clk-lpc32xx.c

+1 −1
Original line number Diff line number Diff line
@@ -956,7 +956,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, 
	val &= div_mask(divider->width);



	return divider_recalc_rate(hw, parent_rate, val, divider->table,

				   divider->flags);

				   divider->flags, divider->width);

}



static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,

drivers/clk/qcom/clk-regmap-divider.c

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, 
	div &= BIT(divider->width) - 1;



	return divider_recalc_rate(hw, parent_rate, div, NULL,

				   CLK_DIVIDER_ROUND_CLOSEST);

				   CLK_DIVIDER_ROUND_CLOSEST, divider->width);

}



const struct clk_ops clk_regmap_div_ops = {

drivers/clk/sprd/div.c

+2 −1
Original line number Diff line number Diff line
@@ -39,7 +39,8 @@ unsigned long sprd_div_helper_recalc_rate(struct sprd_clk_common *common, 
	val = reg >> div->shift;

	val &= (1 << div->width) - 1;



	return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0);

	return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0,

				   div->width);

}

EXPORT_SYMBOL_GPL(sprd_div_helper_recalc_rate);