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Commit 12a26c29 authored by Jerome Brunet's avatar Jerome Brunet Committed by Stephen Boyd
Browse files

clk: divider: fix incorrect usage of container_of 



divider_recalc_rate() is an helper function used by clock divider of
different types, so the structure containing the 'hw' pointer is not
always a 'struct clk_divider'

At the following line:
> div = _get_div(table, val, flags, divider->width);

in several cases, the value of 'divider->width' is garbage as the actual
structure behind this memory is not a 'struct clk_divider'

Fortunately, this width value is used by _get_val() only when
CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so
far when the structure is not a 'struct clk_divider'. This is probably
why we did not notice this bug before

Fixes: afe76c8f ("clk: allow a clk divider with max divisor when zero")
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Acked-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: default avatarSylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 4fbd8d19

drivers/clk/clk-divider.c

+3 −4
Original line number Diff line number Diff line
@@ -118,12 +118,11 @@ static unsigned int _get_val(const struct clk_div_table *table, 
unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,

				  unsigned int val,

				  const struct clk_div_table *table,

				  unsigned long flags)

				  unsigned long flags, unsigned long width)

{

	struct clk_divider *divider = to_clk_divider(hw);

	unsigned int div;



	div = _get_div(table, val, flags, divider->width);

	div = _get_div(table, val, flags, width);

	if (!div) {

		WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),

			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
@@ -145,7 +144,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, 
	val &= div_mask(divider->width);



	return divider_recalc_rate(hw, parent_rate, val, divider->table,

				   divider->flags);

				   divider->flags, divider->width);

}



static bool _is_valid_table_div(const struct clk_div_table *table,

drivers/clk/hisilicon/clkdivider-hi6220.c

+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static unsigned long hi6220_clkdiv_recalc_rate(struct clk_hw *hw, 
	val &= div_mask(dclk->width);



	return divider_recalc_rate(hw, parent_rate, val, dclk->table,

				   CLK_DIVIDER_ROUND_CLOSEST);

				   CLK_DIVIDER_ROUND_CLOSEST, dclk->width);

}



static long hi6220_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate,

drivers/clk/nxp/clk-lpc32xx.c

+1 −1
Original line number Diff line number Diff line
@@ -956,7 +956,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, 
	val &= div_mask(divider->width);



	return divider_recalc_rate(hw, parent_rate, val, divider->table,

				   divider->flags);

				   divider->flags, divider->width);

}



static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,

drivers/clk/qcom/clk-regmap-divider.c

+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, 
	div &= BIT(divider->width) - 1;



	return divider_recalc_rate(hw, parent_rate, div, NULL,

				   CLK_DIVIDER_ROUND_CLOSEST);

				   CLK_DIVIDER_ROUND_CLOSEST, divider->width);

}



const struct clk_ops clk_regmap_div_ops = {

drivers/clk/sunxi-ng/ccu_div.c

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ static unsigned long ccu_div_recalc_rate(struct clk_hw *hw, 
						  parent_rate);



	val = divider_recalc_rate(hw, parent_rate, val, cd->div.table,

				  cd->div.flags);

				  cd->div.flags, cd->div.width);



	if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)

		val /= cd->fixed_post_div;