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Commit 6ca19277 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Update various clock node and GDSC for Scuba"

parents 458c47b0 6f421e82

bindings/clock/qcom,debugcc.txt

+2 −1
Original line number Diff line number Diff line
@@ -3,7 +3,8 @@ Qualcomm Technologies, Inc. Debug Clock Controller Binding 


Required properties :

- compatible: Shall contain "qcom,kona-debugcc", "qcom,lito-debugcc",

		"qcom,bengal-debugcc" or "qcom,lagoon-debugcc".

		"qcom,bengal-debugcc", "qcom,lagoon-debugcc" or

		"qcom,scuba-debugcc".

- qcom,gcc: phandle to the GCC device node.

- qcom,videocc: phandle to the Video CC device node.

- qcom,camcc: phandle to the Camera CC device node.

bindings/clock/qcom,dispcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required properties : 
		"qcom,lito-dispcc"

		"qcom,bengal-dispcc"

		"qcom,lagoon-dispcc"

		"qcom,scuba-dispcc".

- reg : shall contain base register location and length.

- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

of the clocks.

bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ Required properties : 
			"qcom,gcc-lito"

			"qcom,bengal-gcc"

			"qcom,lagoon-gcc"

			"qcom,scuba-gcc".



- reg : shall contain base register location and length

- #clock-cells : shall contain 1

bindings/clock/qcom,gpucc.txt

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ Required properties : 
		"qcom,lito-gpucc".

		"qcom,bengal-gpucc"

		"qcom,lagoon-gpucc".

		"qcom,scuba-gpucc".

- reg: shall contain base register offset and size.

- reg-names: names of registers listed in the same order as in the reg property.

		Must contain "cc_base".

qcom/scuba-gdsc.dtsi

+9 −9
Original line number Diff line number Diff line 
&soc {

	/* GDSCs in GCC */

	gcc_camss_top_gdsc: qcom,gdsc@1458004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x1458004 0x4>;

		regulator-name = "gcc_camss_top_gdsc";

		status = "disabled";

	};



	gcc_usb30_prim_gdsc: qcom,gdsc@141a004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x141a004 0x4>;

		regulator-name = "gcc_usb30_prim_gdsc";

		status = "disabled";

	};



	gcc_vcodec0_gdsc: qcom,gdsc@1458098 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x1458098 0x4>;

		regulator-name = "gcc_vcodec0_gdsc";

		status = "disabled";

	};



	gcc_venus_gdsc: qcom,gdsc@145807c {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x145807c 0x4>;

		regulator-name = "gcc_venus_gdsc";

		status = "disabled";

	};



	hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc: qcom,gdsc@147d074 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x147d074 0x4>;

		regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc";

		qcom,no-status-check-on-disable;
@@ -38,7 +38,7 @@ 
	};



	hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc: qcom,gdsc@147d078 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x147d078 0x4>;

		regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc";

		qcom,no-status-check-on-disable;
@@ -47,7 +47,7 @@ 
	};



	hlos1_vote_turing_mmu_tbu1_gdsc: qcom,gdsc@147d060 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x147d060 0x4>;

		regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";

		qcom,no-status-check-on-disable;
@@ -56,7 +56,7 @@ 
	};



	hlos1_vote_turing_mmu_tbu0_gdsc: qcom,gdsc@147d07c {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x147d07c 0x4>;

		regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";

		qcom,no-status-check-on-disable;
@@ -66,7 +66,7 @@ 


	/* GDSCs in DISPCC */

	mdss_core_gdsc: qcom,gdsc@5f03000 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x5f03000 0x4>;

		regulator-name = "mdss_core_gdsc";

		proxy-supply = <&mdss_core_gdsc>;