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Commit 61decceb authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Configure SMMU for QUP"

parents 720e764d b593c6f4

arch/arm64/boot/dts/qcom/kona-qupv3.dtsi

+9 −21
Original line number Diff line number Diff line
@@ -12,13 +12,9 @@ 
		reg = <0x9c0000 0x2000>;

		qcom,bus-mas-id = <MSM_BUS_MASTER_QUP_0>;

		qcom,bus-slv-id = <MSM_BUS_SLAVE_EBI_CH0>;



		qcom,iommu-s1-bypass;

		iommu_qupv3_0_geni_se_cb: qcom,iommu_qupv3_0_geni_se_cb {

			compatible = "qcom,qupv3-geni-se-cb";

		iommus = <&apps_smmu 0x5a3 0x0>;

			qcom,iommu-dma = "disabled";

		};

		qcom,iommu-dma-addr-pool = <0x40000000 0xc0000000>;

		qcom,iommu-dma = "bypass";

	};



	/* Debug UART Instance for RUMI platform */
@@ -422,13 +418,9 @@ 
		reg = <0xac0000 0x2000>;

		qcom,bus-mas-id = <MSM_BUS_MASTER_QUP_1>;

		qcom,bus-slv-id = <MSM_BUS_SLAVE_EBI_CH0>;



		qcom,iommu-s1-bypass;

		iommu_qupv3_1_geni_se_cb: qcom,iommu_qupv3_1_geni_se_cb {

			compatible = "qcom,qupv3-geni-se-cb";

		iommus = <&apps_smmu 0x43 0x0>;

			qcom,iommu-dma = "disabled";

		};

		qcom,iommu-dma-addr-pool = <0x40000000 0xc0000000>;

		qcom,iommu-dma = "bypass";

	};



	/* Debug UART Instance for CDP/MTP platform */
@@ -709,13 +701,9 @@ 
		reg = <0x8c0000 0x2000>;

		qcom,bus-mas-id = <MSM_BUS_MASTER_QUP_2>;

		qcom,bus-slv-id = <MSM_BUS_SLAVE_EBI_CH0>;



		qcom,iommu-s1-bypass;

		iommu_qupv3_2_geni_se_cb: qcom,iommu_qupv3_2_geni_se_cb {

			compatible = "qcom,qupv3-geni-se-cb";

		iommus = <&apps_smmu 0x63 0x0>;

			qcom,iommu-dma = "disabled";

		};

		qcom,iommu-dma-addr-pool = <0x40000000 0xc0000000>;

		qcom,iommu-dma = "bypass";

	};



	/*