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Commit 60a8d62b authored by Bard Liao's avatar Bard Liao Committed by Mark Brown
Browse files

ASoC: rt5677: fixed wrong DMIC ref clock 



DMIC clock source is not from codec system clock directly. it is
generated from the division of system clock. And it should be 256 *
sample rate of AIF1.

Signed-off-by: default avatarBard Liao <bardliao@realtek.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
parent 74d6ea52

sound/soc/codecs/rt5677.c

+1 −1
Original line number Diff line number Diff line
@@ -904,7 +904,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, 
{

	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);

	struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);

	int idx = rl6231_calc_dmic_clk(rt5677->sysclk);

	int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8);



	if (idx < 0)

		dev_err(codec->dev, "Failed to set DMIC clock\n");