Commit 601cfa7b authored Nov 14, 2013 by Leonid Yegoshin Committed by Ralf Baechle Jan 22, 2014

MIPS: mm: Use the TLBINVF instruction to flush the VTLB



The TLBINVF instruction can be used to flush the entire VTLB.
This eliminates the need for the TLBWI loop and improves performance.

Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6138/

parent 198bb4ce

arch/mips/mm/tlb-r4k.c

+12 −6

Original line number	Diff line number	Diff line
		@@ -83,6 +83,11 @@ void local_flush_tlb_all(void)
		entry = read_c0_wired();

		/* Blast 'em all away. */
		if (cpu_has_tlbinv && current_cpu_data.tlbsize) {
		write_c0_index(0);
		mtc0_tlbw_hazard();
		tlbinvf(); /* invalidate VTLB */
		} else {
		while (entry < current_cpu_data.tlbsize) {
		/* Make sure all entries differ. */
		write_c0_entryhi(UNIQUE_ENTRYHI(entry));
		@@ -91,6 +96,7 @@ void local_flush_tlb_all(void)
		tlb_write_indexed();
		entry++;
		}
		}
		tlbw_use_hazard();
		write_c0_entryhi(old_ctx);
		flush_itlb();